[ARM] Fix missing ELF FPU attributes for fp-armv8-fullfp16-d16 (#105677)

An assembly input with

>   .fpu fp-armv8-fullfp16-d16

crashes the compiler because the ELF FPU attribute emitter misses the
respective entry. This patch fixes this.

Interestingly, compiling with -mfpu=fp-armv8-fullfp16-d16 does not cause
the crash because FPv5_D16 is an alias in the compiler and

>   .fpu fpv5-d16

is emitted instead, which does not crash.

The existing .fpu directive test with multiple FPUs serves the purpose
of verifying that each possible FPU option is defined, but does not
trigger the crash because only the last .fpu directive goes effectively
down the code path. Therefore one test for each FPU is required.

Fixes #105674.

Author: rgwott

llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp

@@ -992,6 +992,10 @@ void ARMTargetELFStreamer::emitFPUDefaultAttributes() {
   // uses the FP_ARMV8_D16 build attribute.
   case ARM::FK_FPV5_SP_D16:
   case ARM::FK_FPV5_D16:
+  // FPv5 and FP-ARMv8 have the same instructions, so are modeled as one
+  // FPU, but there are two different names for it depending on the CPU.
+  case ARM::FK_FP_ARMV8_FULLFP16_SP_D16:
+  case ARM::FK_FP_ARMV8_FULLFP16_D16:
     S.setAttributeItem(ARMBuildAttrs::FP_arch, ARMBuildAttrs::AllowFPARMv8B,
                        /* OverwriteExisting= */ false);
     break;

llvm/test/MC/ARM/directive-fpu-multiple.s

@@ -22,6 +22,8 @@
 	.fpu fpv5-d16
 	.fpu fpv5-sp-d16
 	.fpu fp-armv8
+	.fpu fp-armv8-fullfp16-d16
+	.fpu fp-armv8-fullfp16-sp-d16
 	.fpu neon
 	.fpu neon-fp16
 	.fpu neon-vfpv4

llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu crypto-neon-fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fp-armv8-fullfp16-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP-D16
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fp-armv8-fullfp16-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP-D16
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fpv4-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: VFPv4-D16
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fpv5-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP-D16
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu fpv5-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP-D16
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s

@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ATTR
+
+  .fpu neon-fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: FP_arch
+@ CHECK-ATTR:     Description: ARMv8-a FP
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+