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Commit fe60685

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fix regId for 64bit
1 parent 770c90c commit fe60685

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+7
-4
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1 file changed

+7
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17324,18 +17324,21 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
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1732517325
Register PPCTargetLowering::getRegisterByName(const char* RegName, LLT VT,
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const MachineFunction &MF) const {
17327-
bool isPPC64 = Subtarget.isPPC64();
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17329-
bool is64Bit = isPPC64 && VT == LLT::scalar(64);
17330-
if (!is64Bit && VT != LLT::scalar(32))
17328+
bool Is64Bit = Subtarget.isPPC64() && VT == LLT::scalar(64);
17329+
if (!Is64Bit && VT != LLT::scalar(32))
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report_fatal_error("Invalid register global variable type");
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Register Reg = MatchRegisterName(RegName);
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if (!Reg)
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report_fatal_error(Twine("Invalid global name register \""
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+ StringRef(RegName) + "\"."));
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17338-
if (!Subtarget.getRegisterInfo()->getReservedRegs(MF).test(Reg))
17337+
// Convert GPR to GP8R register for 64bit.
17338+
if (Is64Bit && StringRef(RegName).starts_with_insensitive("r"))
17339+
Reg = Reg.id() - PPC::R0 + PPC::X0;
17340+
17341+
if (Subtarget.getRegisterInfo()->getReservedRegs(MF).test(Reg))
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report_fatal_error(Twine("Trying to obtain non-reservable register \"" +
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StringRef(RegName) + "\"."));
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return Reg;

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