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1 parent 315e64f commit ffbb962Copy full SHA for ffbb962
llvm/lib/Target/AMDGPU/GCNRegPressure.h
@@ -63,8 +63,7 @@ struct GCNRegPressure {
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unsigned NumAGPRs,
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unsigned NumAVGPRs) {
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- // Until we hit the VGPRThreshold, we will assign AV as VGPR. After that
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- // point, we will assign as AGPR.
+ // Assume AVGPRs will be assigned as VGPRs.
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return alignTo(NumArchVGPRs + NumAVGPRs,
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AMDGPU::IsaInfo::getArchVGPRAllocGranule()) +
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NumAGPRs;
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