address more comments

Author: AlexMaclean

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

@@ -570,7 +570,8 @@ Instruction *InstCombinerImpl::foldSelectIntoOp(SelectInst &SI, Value *TrueVal,
 /// exensive modification of the IR is required.
 static Value *foldSelectICmpMinMax(const ICmpInst *Cmp, Value *TVal,
                                    Value *FVal,
-                                   InstCombiner::BuilderTy &Builder) {
+                                   InstCombiner::BuilderTy &Builder,
+                                   const SimplifyQuery &SQ) {
   const Value *CmpLHS = Cmp->getOperand(0);
   const Value *CmpRHS = Cmp->getOperand(1);
   const ICmpInst::Predicate Pred = Cmp->getPredicate();
@@ -579,7 +580,6 @@ static Value *foldSelectICmpMinMax(const ICmpInst *Cmp, Value *TVal,
   // (X < Y) ? X : (Y + 1) ==> MAX(X, Y + 1)
   // This transformation is valid when overflow corresponding to the sign of
   // the comparison is poison and we must drop the non-matching overflow flag.
-  // Note: that the UMIN case is not possible as we canonicalize to addition.
   if (CmpLHS == TVal) {
     if (Pred == CmpInst::ICMP_SGT &&
         match(FVal, m_NSWAddLike(m_Specific(CmpRHS), m_One()))) {
@@ -598,6 +598,15 @@ static Value *foldSelectICmpMinMax(const ICmpInst *Cmp, Value *TVal,
       cast<Instruction>(FVal)->setHasNoSignedWrap(false);
       return Builder.CreateBinaryIntrinsic(Intrinsic::umax, TVal, FVal);
     }
+
+    // Note: We must use isKnownNonZero here because "sub nuw %x, 1" will be
+    // canonicalize to "add %x, -1" discarding the nuw flag.
+    if (Pred == CmpInst::ICMP_ULT &&
+        match(FVal, m_AddLike(m_Specific(CmpRHS), m_AllOnes())) &&
+        isKnownNonZero(CmpRHS, SQ)) {
+      cast<Instruction>(FVal)->setHasNoSignedWrap(false);
+      return Builder.CreateBinaryIntrinsic(Intrinsic::umin, TVal, FVal);
+    }
   }
   return nullptr;
 }
@@ -1954,7 +1963,7 @@ Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
     return &SI;
   }
 
-  if (Value *V = foldSelectICmpMinMax(ICI, TrueVal, FalseVal, Builder))
+  if (Value *V = foldSelectICmpMinMax(ICI, TrueVal, FalseVal, Builder, SQ))
     return replaceInstUsesWith(SI, V);
 
   if (Instruction *V =

llvm/test/Transforms/InstCombine/minmax-fold.ll

@@ -1623,10 +1623,10 @@ define i32 @test_smax_add1_nsw(i32 %x, i32 %w) {
   ret i32 %r
 }
 
-define i32 @test_umax_add1_nsw(i32 %x, i32 %w) {
-; CHECK-LABEL: @test_umax_add1_nsw(
-; CHECK-NEXT:    [[X2:%.*]] = add nuw i32 [[W:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[X2]])
+define i32 @test_umax_add1_nuw(i32 %x, i32 %w) {
+; CHECK-LABEL: @test_umax_add1_nuw(
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 [[W:%.*]], 1
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[ADD]])
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %cmp = icmp ugt i32 %x, %w
@@ -1635,6 +1635,18 @@ define i32 @test_umax_add1_nsw(i32 %x, i32 %w) {
   ret i32 %r
 }
 
+define i32 @test_umin_sub1_nuw(i32 %x, i32 range(i32 1, 0) %w) {
+; CHECK-LABEL: @test_umin_sub1_nuw(
+; CHECK-NEXT:    [[SUB:%.*]] = add i32 [[W:%.*]], -1
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[SUB]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cmp = icmp ult i32 %x, %w
+  %sub = add i32 %w, -1
+  %r = select i1 %cmp, i32 %x, i32 %sub
+  ret i32 %r
+}
+
 define <2 x i16> @test_smin_sub1_nsw_vec(<2 x i16> %x, <2 x i16> %w) {
 ; CHECK-LABEL: @test_smin_sub1_nsw_vec(
 ; CHECK-NEXT:    [[SUB:%.*]] = add nsw <2 x i16> [[W:%.*]], splat (i16 -1)
@@ -1659,8 +1671,8 @@ define <2 x i16> @test_smax_add1_nsw_vec(<2 x i16> %x, <2 x i16> %w) {
   ret <2 x i16> %r
 }
 
-define <2 x i16> @test_umax_add1_nsw_vec(<2 x i16> %x, <2 x i16> %w) {
-; CHECK-LABEL: @test_umax_add1_nsw_vec(
+define <2 x i16> @test_umax_add1_nuw_vec(<2 x i16> %x, <2 x i16> %w) {
+; CHECK-LABEL: @test_umax_add1_nuw_vec(
 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw <2 x i16> [[W:%.*]], splat (i16 1)
 ; CHECK-NEXT:    [[R:%.*]] = call <2 x i16> @llvm.umax.v2i16(<2 x i16> [[X:%.*]], <2 x i16> [[ADD]])
 ; CHECK-NEXT:    ret <2 x i16> [[R]]
@@ -1671,6 +1683,19 @@ define <2 x i16> @test_umax_add1_nsw_vec(<2 x i16> %x, <2 x i16> %w) {
   ret <2 x i16> %r
 }
 
+define <2 x i16> @test_umin_sub1_nuw_vec(<2 x i16> %x, <2 x i16> range(i16 1, 0) %w) {
+; CHECK-LABEL: @test_umin_sub1_nuw_vec(
+; CHECK-NEXT:    [[SUB:%.*]] = add <2 x i16> [[W:%.*]], splat (i16 -1)
+; CHECK-NEXT:    [[R:%.*]] = call <2 x i16> @llvm.umin.v2i16(<2 x i16> [[X:%.*]], <2 x i16> [[SUB]])
+; CHECK-NEXT:    ret <2 x i16> [[R]]
+;
+  %cmp = icmp ult <2 x i16> %x, %w
+  %sub = add <2 x i16> %w, splat (i16 -1)
+  %r = select <2 x i1> %cmp, <2 x i16> %x, <2 x i16> %sub
+  ret <2 x i16> %r
+}
+
+
 define i32 @test_smin_sub1_nsw_drop_flags(i32 %x, i32 %w) {
 ; CHECK-LABEL: @test_smin_sub1_nsw_drop_flags(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[X:%.*]], [[W:%.*]]
@@ -1695,8 +1720,8 @@ define i32 @test_smax_add1_nsw_drop_flags(i32 %x, i32 %w) {
   ret i32 %r
 }
 
-define i32 @test_umax_add1_nsw_drop_flags(i32 %x, i32 %w) {
-; CHECK-LABEL: @test_umax_add1_nsw_drop_flags(
+define i32 @test_umax_add1_nuw_drop_flags(i32 %x, i32 %w) {
+; CHECK-LABEL: @test_umax_add1_nuw_drop_flags(
 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 [[W:%.*]], 1
 ; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[ADD]])
 ; CHECK-NEXT:    ret i32 [[R]]
@@ -1706,3 +1731,15 @@ define i32 @test_umax_add1_nsw_drop_flags(i32 %x, i32 %w) {
   %r = select i1 %cmp, i32 %x, i32 %add
   ret i32 %r
 }
+
+define i32 @test_umin_sub1_nuw_drop_flags(i32 %x, i32 range(i32 1, 0) %w) {
+; CHECK-LABEL: @test_umin_sub1_nuw_drop_flags(
+; CHECK-NEXT:    [[SUB:%.*]] = add i32 [[W:%.*]], -1
+; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[SUB]])
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %cmp = icmp ult i32 %x, %w
+  %sub = add nsw i32 %w, -1
+  %r = select i1 %cmp, i32 %x, i32 %sub
+  ret i32 %r
+}