[clang] Silent missasembly of invalid x86 addressing mode

[ormris]

An assembler load instruction with an invalid addressing mode on x86 is silently missassembled to a separate instruction that was not requested.

$ cat test.s
.intel_syntax noprefix
.code64
test_case:
        lea     rdi, [(label + rsi) + rip]
label:
        .quad 42
$ clang --version | head -n1
clang version 20.0.0git (git@github.com:llvm/llvm-project.git def22f4e718daa74c2d0c03a32e32d4913a46278)
$ clang -c -o test.o test.s
$ llvm-objdump -d test.o

test.o: file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <test_case>:
       0: 48 8d 3d 00 00 00 00          leaq    (%rip), %rdi            # 0x7 <label>

0000000000000007 <label>:
       7: 2a 00                         subb    (%rax), %al
       9: 00 00                         addb    %al, (%rax)
       b: 00 00                         addb    %al, (%rax)
       d: 00 00                         addb    %al, (%rax)
$

[llvmbot]

@llvm/issue-subscribers-clang-codegen

Author: Matthew Voss (ormris)

An assembler load instruction with an invalid addressing mode on x86 is silently missassembled to a separate instruction that was not requested.

$ cat test.s
.intel_syntax noprefix
.code64
test_case:
        lea     rdi, [(label + rsi) + rip]
label:
        .quad 42
$ clang --version | head -n1
clang version 20.0.0git (git@<!-- -->github.com:llvm/llvm-project.git def22f4e718daa74c2d0c03a32e32d4913a46278)
$ clang -c -o test.o test.s
$ llvm-objdump -d test.o

test.o: file format elf64-x86-64

Disassembly of section .text:

0000000000000000 &lt;test_case&gt;:
       0: 48 8d 3d 00 00 00 00          leaq    (%rip), %rdi            # 0x7 &lt;label&gt;

0000000000000007 &lt;label&gt;:
       7: 2a 00                         subb    (%rax), %al
       9: 00 00                         addb    %al, (%rax)
       b: 00 00                         addb    %al, (%rax)
       d: 00 00                         addb    %al, (%rax)
$

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Matthew Voss (ormris)

An assembler load instruction with an invalid addressing mode on x86 is silently missassembled to a separate instruction that was not requested.

$ cat test.s
.intel_syntax noprefix
.code64
test_case:
        lea     rdi, [(label + rsi) + rip]
label:
        .quad 42
$ clang --version | head -n1
clang version 20.0.0git (git@<!-- -->github.com:llvm/llvm-project.git def22f4e718daa74c2d0c03a32e32d4913a46278)
$ clang -c -o test.o test.s
$ llvm-objdump -d test.o

test.o: file format elf64-x86-64

Disassembly of section .text:

0000000000000000 &lt;test_case&gt;:
       0: 48 8d 3d 00 00 00 00          leaq    (%rip), %rdi            # 0x7 &lt;label&gt;

0000000000000007 &lt;label&gt;:
       7: 2a 00                         subb    (%rax), %al
       9: 00 00                         addb    %al, (%rax)
       b: 00 00                         addb    %al, (%rax)
       d: 00 00                         addb    %al, (%rax)
$