[SLP, -slp-revec] Assertion `DemandedElts.getBitWidth() == Ty->getNumElements() && "Vector size mismatch"' failed.

[JonPsson1]

opt -mtriple=systemz-unknown -O3 -o /dev/null -mcpu=z15 ./tc_slp_revec.bc -force-vector-width=4 -slp-revec -disable-licm-promotion

...
#10 0x000002aa01f3e642 llvm::slpvectorizer::BoUpSLP::reorderGatherNode

tc_slp_revec.tar.gz

@HanKuanChen

[HanKuanChen]

Thanks for bug report. It would be good to show the test like this #117518. You can use opt-bisect-limit=-1 with opt to find the test before the SLP pass and use llvm-reduce to get a fine test like this

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -mtriple=systemz-unknown -mcpu=z15 -passes=slp-vectorizer -S -slp-revec %s | FileCheck %s

define void @h() {
entry:
  %0 = shl <4 x i32> zeroinitializer, zeroinitializer
  %1 = or <4 x i32> %0, zeroinitializer
  %2 = or <4 x i32> splat (i32 1), zeroinitializer
  %3 = or <4 x i32> zeroinitializer, zeroinitializer
  %4 = shl <4 x i32> zeroinitializer, zeroinitializer
  %5 = or <4 x i32> %4, zeroinitializer
  %6 = and <4 x i32> %2, %1
  %7 = and <4 x i32> %3, %6
  %8 = and <4 x i32> %5, %7
  %9 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %8)
  ret void
}