[AArch64] Correct scheduling information for flag manipulation instructions in Neoverse-V2

[Asher8118]

Some instructions have incorrect scheduling information when compared to the Neoverse-V2 Software optimisation Guide(link to V2 SWOG: https://developer.arm.com/documentation/109898/latest/) :

Instruction Group	AArch64 Instructions	Exec Latency	Exec Throughput	Utilised Pipelines
Flag manipulation instructions	SETF8, SETF16,RMIF, CFINV	1	1	F

For example:

rmif
cfinv
setf8 w1
setf16 w1

Running llvm-mca -mtriple=aarch64 -mcpu=neoverse-v2 -instruction-tables on the above instructions gives the following output:

Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      1     0.17                  U     rmif  #0, #0, #0
 1      1     0.06                  U     cfinv
 1      1     0.17                  U     setf8 w1
 1      1     0.17                  U     setf16        w1


Resources:
[0.0] - V2UnitB
[0.1] - V2UnitB
[1.0] - V2UnitD
[1.1] - V2UnitD
[2]   - V2UnitL2
[3.0] - V2UnitL01
[3.1] - V2UnitL01
[4]   - V2UnitM0
[5]   - V2UnitM1
[6]   - V2UnitS0
[7]   - V2UnitS1
[8]   - V2UnitS2
[9]   - V2UnitS3
[10]  - V2UnitV0
[11]  - V2UnitV1
[12]  - V2UnitV2
[13]  - V2UnitV3


Resource pressure per iteration:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   
 -      -      -      -      -      -      -     0.50   0.50   0.50   0.50   0.50   0.50    -      -      -      -     

Resource pressure by instruction:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     rmif     #0, #0, #0
 -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -     cfinv
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf8    w1
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf16   w1

The output shows that every instruction has latency 1, throughput 6 and uses pipeline I. This is incorrect and should be fixed in the Neoverse-V2 scheduling model to match the SWOG:

llvm-project/llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td

Lines 1139 to 1140 in f37bee1

	// Flag manipulation instructions
	def : WriteRes<WriteSys, []> { let Latency = 1; }

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: Ash Dobrescu (Rin18)

Some instructions have incorrect scheduling information when compared to the Neoverse-V2 Software optimisation Guide(link to V2 SWOG: https://developer.arm.com/documentation/109898/latest/) :

Instruction Group	AArch64 Instructions	Exec Latency	Exec Throughput	Utilised Pipelines
Flag manipulation instructions	SETF8, SETF16,RMIF, CFINV	1	1	F

For example:

rmif
cfinv
setf8 w1
setf16 w1

Running llvm-mca -mtriple=aarch64 -mcpu=neoverse-v2 -instruction-tables on the above instructions gives the following output:

Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      1     0.17                  U     rmif  #<!-- -->0, #<!-- -->0, #<!-- -->0
 1      1     0.06                  U     cfinv
 1      1     0.17                  U     setf8 w1
 1      1     0.17                  U     setf16        w1


Resources:
[0.0] - V2UnitB
[0.1] - V2UnitB
[1.0] - V2UnitD
[1.1] - V2UnitD
[2]   - V2UnitL2
[3.0] - V2UnitL01
[3.1] - V2UnitL01
[4]   - V2UnitM0
[5]   - V2UnitM1
[6]   - V2UnitS0
[7]   - V2UnitS1
[8]   - V2UnitS2
[9]   - V2UnitS3
[10]  - V2UnitV0
[11]  - V2UnitV1
[12]  - V2UnitV2
[13]  - V2UnitV3


Resource pressure per iteration:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   
 -      -      -      -      -      -      -     0.50   0.50   0.50   0.50   0.50   0.50    -      -      -      -     

Resource pressure by instruction:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     rmif     #<!-- -->0, #<!-- -->0, #<!-- -->0
 -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -     cfinv
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf8    w1
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf16   w1

The output shows that every instruction has latency 1, throughput 6 and uses pipeline I. This is incorrect and should be fixed in the Neoverse-V2 scheduling model to match the SWOG:

llvm-project/llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td

Lines 1139 to 1140 in f37bee1

	// Flag manipulation instructions
	def : WriteRes<WriteSys, []> { let Latency = 1; }

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

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3. Fix the issue locally.
4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
5. Create a Git commit.
6. Run git clang-format HEAD~1 to format your changes.
7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Ash Dobrescu (Rin18)

Some instructions have incorrect scheduling information when compared to the Neoverse-V2 Software optimisation Guide(link to V2 SWOG: https://developer.arm.com/documentation/109898/latest/) :

Instruction Group	AArch64 Instructions	Exec Latency	Exec Throughput	Utilised Pipelines
Flag manipulation instructions	SETF8, SETF16,RMIF, CFINV	1	1	F

For example:

rmif
cfinv
setf8 w1
setf16 w1

Running llvm-mca -mtriple=aarch64 -mcpu=neoverse-v2 -instruction-tables on the above instructions gives the following output:

Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      1     0.17                  U     rmif  #<!-- -->0, #<!-- -->0, #<!-- -->0
 1      1     0.06                  U     cfinv
 1      1     0.17                  U     setf8 w1
 1      1     0.17                  U     setf16        w1


Resources:
[0.0] - V2UnitB
[0.1] - V2UnitB
[1.0] - V2UnitD
[1.1] - V2UnitD
[2]   - V2UnitL2
[3.0] - V2UnitL01
[3.1] - V2UnitL01
[4]   - V2UnitM0
[5]   - V2UnitM1
[6]   - V2UnitS0
[7]   - V2UnitS1
[8]   - V2UnitS2
[9]   - V2UnitS3
[10]  - V2UnitV0
[11]  - V2UnitV1
[12]  - V2UnitV2
[13]  - V2UnitV3


Resource pressure per iteration:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   
 -      -      -      -      -      -      -     0.50   0.50   0.50   0.50   0.50   0.50    -      -      -      -     

Resource pressure by instruction:
[0.0]  [0.1]  [1.0]  [1.1]  [2]    [3.0]  [3.1]  [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     rmif     #<!-- -->0, #<!-- -->0, #<!-- -->0
 -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -      -     cfinv
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf8    w1
 -      -      -      -      -      -      -     0.17   0.17   0.17   0.17   0.17   0.17    -      -      -      -     setf16   w1

The output shows that every instruction has latency 1, throughput 6 and uses pipeline I. This is incorrect and should be fixed in the Neoverse-V2 scheduling model to match the SWOG:

llvm-project/llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td

Lines 1139 to 1140 in f37bee1

	// Flag manipulation instructions
	def : WriteRes<WriteSys, []> { let Latency = 1; }

[PhilippRados]

I looked into this issue to learn more about scheduling and just changed the pipeline utilization to use pipeline F (and the flagset resource) like so:

// Flag manipulation instructions
def : InstRW<[V2Write_1c_1F_1Flg], (instregex "^(RMIF|CFINV)",
                                              "^SETF(8|16)")>;

However since the throughput is fixed to the number of proc-resources I'm not sure how to achieve the actual throughput of 1 as it's documented in the SWOG mentioned above.

EDIT: I bumped up the ReleaseAtCycles to occupy the resources for a longer time to match the actual throughput. I will put up a PR once I have run the tests.

[Asher8118]

Hello @PhilippRados, thanks for taking an interest in this issue!

changed the pipeline utilization to use pipeline F (and the flagset resource) like so

Good catch, changing to pipeline F to match the SWOG is the right thing to do here. Looking into ReleaseAtCycles to match the throughput is also a good idea.

I will put up a PR once I have run the tests.

When you create the PR feel free to add me as a reviewer.