MIPS/ASM: may optimize SW + ADDIU

[wzssyqa]

An asm code like

        .set    reorder
xxx:
$BB0_1:                                 # %for.body
        sw      $4, 0($2)
        addiu   $2, $2, 4
        bne     $2, $3, $BB0_1

may be optimized to

        .set    reorder
xxx:
$BB0_1:                                 # %for.body
        addiu   $2, $2, 4
        sw      $4, -4($2)
        bne     $2, $3, $BB0_1

So that the sw can be placed into delay slot.

[wzssyqa]

@yingopq do you have any interesting on it?

[yingopq]

OK, I would do research on it.

[wzssyqa]

The C code for it is like

int x[114500];
void f() {
   for (int i = 0; i < 114500; i++)
       x[i] = 5;
}

[llvmbot]

@llvm/issue-subscribers-backend-mips

Author: YunQiang Su (wzssyqa)

An asm code like ``` .set reorder xxx: $BB0_1: # %for.body sw $4, 0($2) addiu $2, $2, 4 bne $2, $3, $BB0_1 ```

may be optimized to

        .set    reorder
xxx:
$BB0_1:                                 # %for.body
        addiu   $2, $2, 4
        sw      $4, -4($2)
        bne     $2, $3, $BB0_1

So that the sw can be placed into delay slot.

[yingopq]

After ./build/bin/clang --target=mipsel-linux-gnu -O3 -S 1.c -o 1.s, the result is:

$BB0_1:                                 # %for.body
                                        # =>This Inner Loop Header: Depth=1
	addu	$1, $3, $2
	addiu	$2, $2, 4
	bne	$2, $5, $BB0_1
	sw	$4, 0($1)
# %bb.2:                                # %for.cond.cleanup
	jr	$ra
	nop

sw has been placed in the delay slot of bne.

I can not reproduce sw+addiu+bne.

[brad0]

@wzssyqa

[wzssyqa]

After ./build/bin/clang --target=mipsel-linux-gnu -O3 -S 1.c -o 1.s, the result is:

$BB0_1:                                 # %for.body
                                        # =>This Inner Loop Header: Depth=1
	addu	$1, $3, $2
	addiu	$2, $2, 4
	bne	$2, $5, $BB0_1
	sw	$4, 0($1)
# %bb.2:                                # %for.cond.cleanup
	jr	$ra
	nop

sw has been placed in the delay slot of bne.

I can not reproduce sw+addiu+bne.

Just use my asm example.

[wzssyqa]

Another example that delay slot is not used

        .set    reorder
xxx:
$BB0_1:                                 # %for.body
        mfhc1   $2, $f12
        jr      $ra

[brad0]

Ping.

[yingopq]

After ./build/bin/clang --target=mipsel-linux-gnu -O3 -S 1.c -o 1.s, the result is:

$BB0_1:                                 # %for.body
                                        # =>This Inner Loop Header: Depth=1
	addu	$1, $3, $2
	addiu	$2, $2, 4
	bne	$2, $5, $BB0_1
	sw	$4, 0($1)
# %bb.2:                                # %for.cond.cleanup
	jr	$ra
	nop

sw has been placed in the delay slot of bne.
I can not reproduce sw+addiu+bne.

Just use my asm example.

Did you mean doing optimization in MipsAsmParser?