[RegAlloc][AArch64] Missed optimizate for register spill

[hstk30-hw]

https://godbolt.org/z/z4MrMcW4j

typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long int uint64_t;

typedef struct param_s {
    void *a;
    uint32_t b;
    uint32_t c;
    uint8_t d : 1;
} param_t;

typedef _Bool (*IsEnabled)();

typedef struct {
    IsEnabled Enabled;
} FuncCb;

extern FuncCb g_hookFunc;

uint64_t bar(void *flow, uint16_t type);
uint64_t fuzz(void *flow, uint32_t syncType);
uint64_t bob(void *flow);

void foo(param_t *param)
{
    if (param->a == ((void*)0)) {
        return;
    }

    if (__builtin_expect(!!(param->b != 0), 0)) {
        (void)fuzz(param->a, param->b);
    }

    if (__builtin_expect(!!(param->c != 0), 0)) {
        if (g_hookFunc.Enabled()) {
            (void)bar(param->a, (uint16_t)param->c);
        }
    }

    if (__builtin_expect(!!(param->d != 0), 0)) {
        (void)bob(param->a);
    }

    return;
}

For this case, LLVM spill X19 to stack, GCC 15 has optimizated it.

[pinskia]

GCC has a spill location for x2 instead. The reason is because since the basic blocks that clobber x2 are unlikely so it is better if not spill x2 at all except in those unlikely blocks which clobber x2 (via the call). This changed only in GCC 15 .

[hstk30-hw]

It's brilliant. This shortens the hot trace 👍

[hstk30-hw]

CC @qcolombet @weiguozhi Do you have any idea about this case? Can we improve it?

[weiguozhi]

@pinskia 's explanation is reasonable to me. Actually LLVM also considers the trade off between spill VS callee saved register in RAGreedy::tryAssignCSRFirstTime, obviously it needs more improvement.