[VPlan] Assertions with patch #141900

[vzakhari]

Hi @ElvisWang123, this is one of the examples where assertions kick in with #141900. It is reduced from SPEC CPU2000/sixtrack.

reduced.ll.gz

Command: opt --passes=loop-vectorize reduced.ll -prefer-control-flow

[ElvisWang123]

Sorry for late response.
The assertion seems fixed after rebasing the latest main (9/30).
I found some cost difference between the legacy model and the vplan based model and will try to fix it.