[Feature Request] Add OPERAND_MEMORY as a OperandType to AArch64 target

[Sharjeel-Khan]

I noticed many backends have OperandType so it is easier to query if they are memory operands by checking if OperandType is OPERAND_MEMORY. This is not the case for AArch64 target but you can do this for the ARM target. I looked through all the backend with Operand_Memory and it seems to be mostly for disassembling or llvm-exegesis.

It would be nice to add it to AArch64 because it adds more information to the operands. This new type will help us with simplifying some code in our work within a fork of LLVM that we plan to upstream in the future. The commits that added it previously in other backends said it should not affect anything in-tree. I just want to see if this would be an alright change with maintainers before I make a PR.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: Sharjeel Khan (Sharjeel-Khan)

I noticed [many backends](https://github.com/search?q=repo%3Allvm%2Fllvm-project%20OPERAND_MEMORY&type=code) have OperandType so it is easier to query if they are memory operands by checking if OperandType is OPERAND_MEMORY. This is not the case for AArch64 target but you can do this for the [ARM target](https://github.com/llvm/llvm-project/blob/ddd49c61ccd96c6bb4b019a5627c3a303bc378e4/llvm/lib/Target/ARM/ARMInstrInfo.td#L576). I looked through all the backend with Operand_Memory and it seems to be mostly for [disassembling](https://github.com/llvm/llvm-project/commit/273a9b4f03d2d22b4f0d673aa55e1abd0d32a028) or [llvm-exegesis](https://github.com/llvm/llvm-project/commit/95ef005230e9f793aeb84e2f5ee58571698aace6).

It would be nice to add it to AArch64 because it adds more information to the operands. This new type will help us with simplifying some code in our work within a fork of LLVM that we plan to upstream in the future. The commits that added it previously in other backends said it should not affect anything in-tree. I just want to see if this would be an alright change with maintainers before I make a PR.

[davemgreen]

Hello - It sounds fine to add them if it is added to the base register and we are clear what they mean. I would expect the immediate operand to be an OPERAND_IMM12s4 or something like it so we can check the range is valid.

There is some similar info available via AArch64InstrInfo::getMemOpInfo, but only for certain opcodes.