[CIR][NFC] Use TableGen to generate LLVM lowering patterns #159390
Merged
+223
−876
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Lancern
requested review from
andykaylor,
bcardosolopes,
lanza and
xlauko
as code owners
llvmbot
added
clang
|
@llvm/pr-subscribers-clang Author: Sirui Mu (Lancern) ChangesMost lowering patterns have exactly the same class declaration with different names and different
Note that in the incubator we have a similar TableGen code generator that generates LLVM lowering code for CIR builtin ops which has a one-to-one correspondence to LLVM dialect operations. This patch does NOT try to upstream it. Some additional noticeable changes made by this patch:
Patch is 47.18 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/159390.diff 8 Files Affected:
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index 38c4a87f69d6d..f80c9faf708ef 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -78,7 +78,15 @@ class LLVMLoweringInfo {
}
class CIR_Op<string mnemonic, list<Trait> traits = []> :
- Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo;
+ Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo {
+ // Should we generate an LLVM lowering pattern for this op?
+ bit hasLLVMLowering = true;
+ // Is the LLVM lowering pattern for this operation recursive?
+ bit isLLVMLoweringRecursive = false;
+ // Extra class declarations to be included in the generated LLVM lowering
+ // pattern.
+ code extraLLVMLoweringPatternDecl = "";
+}
//===----------------------------------------------------------------------===//
// CastOp
@@ -218,6 +226,10 @@ def CIR_CastOp : CIR_Op<"cast", [
// The input and output types should match the cast kind.
let hasVerifier = 1;
let hasFolder = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::Type convertTy(mlir::Type ty) const;
+ }];
}
@@ -297,6 +309,8 @@ def CIR_ConstantOp : CIR_Op<"const", [
}];
let hasFolder = 1;
+
+ let isLLVMLoweringRecursive = true;
}
//===----------------------------------------------------------------------===//
@@ -613,6 +627,8 @@ def CIR_IfOp : CIR_Op<"if", [
CArg<"BuilderCallbackRef", "buildTerminatedBody">:$thenBuilder,
CArg<"BuilderCallbackRef", "nullptr">:$elseBuilder)>
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -659,6 +675,7 @@ def CIR_ConditionOp : CIR_Op<"condition", [
let arguments = (ins CIR_BoolType:$condition);
let assemblyFormat = " `(` $condition `)` attr-dict ";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -726,6 +743,8 @@ def CIR_YieldOp : CIR_Op<"yield", [
let builders = [
OpBuilder<(ins), [{ /* nothing to do */ }]>,
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -741,6 +760,7 @@ def CIR_BreakOp : CIR_Op<"break", [Terminator]> {
}];
let assemblyFormat = "attr-dict";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -756,6 +776,7 @@ def CIR_ContinueOp : CIR_Op<"continue", [Terminator]> {
}];
let assemblyFormat = "attr-dict";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -814,6 +835,8 @@ def CIR_ScopeOp : CIR_Op<"scope", [
// Scopes without yielding values.
OpBuilder<(ins "llvm::function_ref<void(mlir::OpBuilder &, mlir::Location)>":$scopeBuilder)>
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -860,6 +883,8 @@ def CIR_CaseOp : CIR_Op<"case", [
"CaseOpKind":$kind,
"mlir::OpBuilder::InsertPoint &":$insertPoint)>
];
+
+ let hasLLVMLowering = false;
}
def CIR_SwitchOp : CIR_Op<"switch", [
@@ -1025,6 +1050,8 @@ def CIR_SwitchOp : CIR_Op<"switch", [
// This is an expensive and need to be used with caution.
bool isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases);
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1170,6 +1197,8 @@ def CIR_GotoOp : CIR_Op<"goto", [Terminator]> {
}];
let arguments = (ins StrAttr:$label);
let assemblyFormat = [{ $label attr-dict }];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1185,6 +1214,8 @@ def CIR_LabelOp : CIR_Op<"label", [AlwaysSpeculatable]> {
let arguments = (ins StrAttr:$label);
let assemblyFormat = [{ $label attr-dict }];
let hasVerifier = 1;
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1349,6 +1380,8 @@ def CIR_WhileOp : CIR_WhileOpBase<"while"> {
}
```
}];
+
+ let hasLLVMLowering = false;
}
def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
@@ -1375,6 +1408,8 @@ def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
}
```
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1442,6 +1477,8 @@ def CIR_ForOp : CIR_LoopOpBase<"for"> {
return llvm::SmallVector<mlir::Region *, 3>{&getCond(), &getBody(), &getStep()};
}
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1480,6 +1517,8 @@ def CIR_CmpOp : CIR_Op<"cmp", [Pure, SameTypeOperands]> {
let assemblyFormat = [{
`(` $kind `,` $lhs `,` $rhs `)` `:` type($lhs) `,` type($result) attr-dict
}];
+
+ let isLLVMLoweringRecursive = true;
}
//===----------------------------------------------------------------------===//
@@ -1550,6 +1589,10 @@ def CIR_BinOp : CIR_Op<"binop", [
}];
let hasVerifier = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::LLVM::IntegerOverflowFlags getIntOverflowFlag(cir::BinOp op) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -1687,6 +1730,8 @@ def CIR_TernaryOp : CIR_Op<"ternary", [
`false` $falseRegion
`)` `:` functional-type(operands, results) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1790,6 +1835,20 @@ def CIR_GlobalOp : CIR_Op<"global", [
"cir::GlobalLinkageKind::ExternalLinkage">:$linkage)>];
let hasVerifier = 1;
+
+ let isLLVMLoweringRecursive = true;
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::LogicalResult matchAndRewriteRegionInitializedGlobal(
+ cir::GlobalOp op, mlir::Attribute init,
+ mlir::ConversionPatternRewriter &rewriter) const;
+
+ void setupRegionInitializedLLVMGlobalOp(
+ cir::GlobalOp op, mlir::ConversionPatternRewriter &rewriter) const;
+
+ mutable mlir::LLVM::ComdatOp comdatOp = nullptr;
+ mlir::SymbolRefAttr getComdatAttr(cir::GlobalOp &op,
+ mlir::OpBuilder &builder) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -2340,6 +2399,19 @@ def CIR_FuncOp : CIR_Op<"func", [
let hasCustomAssemblyFormat = 1;
let hasVerifier = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ static mlir::StringRef getLinkageAttrNameString() { return "linkage"; }
+
+ void lowerFuncAttributes(
+ cir::FuncOp func, bool filterArgAndResAttrs,
+ mlir::SmallVectorImpl<mlir::NamedAttribute> &result) const;
+
+ mlir::LogicalResult
+ matchAndRewriteAlias(cir::FuncOp op, llvm::StringRef aliasee, mlir::Type ty,
+ OpAdaptor adaptor,
+ mlir::ConversionPatternRewriter &rewriter) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -2761,6 +2833,8 @@ class CIR_ArrayInitDestroy<string mnemonic> : CIR_Op<mnemonic> {
regionBuilder($_builder, $_state.location);
}]>
];
+
+ let hasLLVMLowering = false;
}
def CIR_ArrayCtor : CIR_ArrayInitDestroy<"array.ctor"> {
@@ -3380,6 +3454,8 @@ def CIR_ComplexMulOp : CIR_Op<"complex.mul", [
let assemblyFormat = [{
$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
def CIR_ComplexDivOp : CIR_Op<"complex.div", [
@@ -3422,6 +3498,8 @@ def CIR_ComplexDivOp : CIR_Op<"complex.div", [
let assemblyFormat = [{
$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
diff --git a/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt b/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
index 6e7f3da4add3e..870f9e3f5d052 100644
--- a/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
+++ b/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
@@ -20,6 +20,10 @@ mlir_tablegen(CIROpsAttributes.h.inc -gen-attrdef-decls)
mlir_tablegen(CIROpsAttributes.cpp.inc -gen-attrdef-defs)
add_public_tablegen_target(MLIRCIREnumsGen)
+clang_tablegen(CIRLowering.inc -gen-cir-lowering
+ SOURCE CIROps.td
+ TARGET CIRLowering)
+
set(LLVM_TARGET_DEFINITIONS CIRTypeConstraints.td)
mlir_tablegen(CIRTypeConstraints.h.inc -gen-type-constraint-decls)
mlir_tablegen(CIRTypeConstraints.cpp.inc -gen-type-constraint-defs)
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
index 1d7e3df1430ac..e18149a61abd0 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -2463,87 +2463,11 @@ void ConvertCIRToLLVMPass::runOnOperation() {
mlir::RewritePatternSet patterns(&getContext());
- patterns.add<CIRToLLVMReturnOpLowering>(patterns.getContext());
- // This could currently be merged with the group below, but it will get more
- // arguments later, so we'll keep it separate for now.
- patterns.add<CIRToLLVMAllocaOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMLoadOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMStoreOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMGlobalOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMCastOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMPtrStrideOpLowering>(converter, patterns.getContext(),
- dl);
- patterns.add<CIRToLLVMInlineAsmOpLowering>(converter, patterns.getContext(),
- dl);
patterns.add<
- // clang-format off
- CIRToLLVMACosOpLowering,
- CIRToLLVMASinOpLowering,
- CIRToLLVMAssumeOpLowering,
- CIRToLLVMAssumeAlignedOpLowering,
- CIRToLLVMAssumeSepStorageOpLowering,
- CIRToLLVMAtomicCmpXchgLowering,
- CIRToLLVMBaseClassAddrOpLowering,
- CIRToLLVMATanOpLowering,
- CIRToLLVMBinOpLowering,
- CIRToLLVMBitClrsbOpLowering,
- CIRToLLVMBitClzOpLowering,
- CIRToLLVMBitCtzOpLowering,
- CIRToLLVMBitFfsOpLowering,
- CIRToLLVMBitParityOpLowering,
- CIRToLLVMBitPopcountOpLowering,
- CIRToLLVMBitReverseOpLowering,
- CIRToLLVMBrCondOpLowering,
- CIRToLLVMBrOpLowering,
- CIRToLLVMByteSwapOpLowering,
- CIRToLLVMCallOpLowering,
- CIRToLLVMCmpOpLowering,
- CIRToLLVMComplexAddOpLowering,
- CIRToLLVMComplexCreateOpLowering,
- CIRToLLVMComplexImagOpLowering,
- CIRToLLVMComplexImagPtrOpLowering,
- CIRToLLVMComplexRealOpLowering,
- CIRToLLVMComplexRealPtrOpLowering,
- CIRToLLVMComplexSubOpLowering,
- CIRToLLVMCopyOpLowering,
- CIRToLLVMCosOpLowering,
- CIRToLLVMConstantOpLowering,
- CIRToLLVMExpectOpLowering,
- CIRToLLVMFAbsOpLowering,
- CIRToLLVMFrameAddrOpLowering,
- CIRToLLVMFuncOpLowering,
- CIRToLLVMGetBitfieldOpLowering,
- CIRToLLVMGetGlobalOpLowering,
- CIRToLLVMGetMemberOpLowering,
- CIRToLLVMReturnAddrOpLowering,
- CIRToLLVMRotateOpLowering,
- CIRToLLVMSelectOpLowering,
- CIRToLLVMSetBitfieldOpLowering,
- CIRToLLVMShiftOpLowering,
- CIRToLLVMStackRestoreOpLowering,
- CIRToLLVMStackSaveOpLowering,
- CIRToLLVMSwitchFlatOpLowering,
- CIRToLLVMThrowOpLowering,
- CIRToLLVMTrapOpLowering,
- CIRToLLVMUnaryOpLowering,
- CIRToLLVMUnreachableOpLowering,
- CIRToLLVMVAArgOpLowering,
- CIRToLLVMVAEndOpLowering,
- CIRToLLVMVAStartOpLowering,
- CIRToLLVMVecCmpOpLowering,
- CIRToLLVMVecCreateOpLowering,
- CIRToLLVMVecExtractOpLowering,
- CIRToLLVMVecInsertOpLowering,
- CIRToLLVMVecShuffleDynamicOpLowering,
- CIRToLLVMVecShuffleOpLowering,
- CIRToLLVMVecSplatOpLowering,
- CIRToLLVMVecTernaryOpLowering,
- CIRToLLVMVTableAddrPointOpLowering,
- CIRToLLVMVTableGetVPtrOpLowering,
- CIRToLLVMVTableGetVirtualFnAddrOpLowering,
- CIRToLLVMVTTAddrPointOpLowering
- // clang-format on
- >(converter, patterns.getContext());
+#define GET_LLVM_LOWERING_PATTERNS_LIST
+#include "clang/CIR/Dialect/IR/CIRLowering.inc"
+#undef GET_LLVM_LOWERING_PATTERNS_LIST
+ >(converter, patterns.getContext(), dl);
processCIRAttrs(module);
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
index 09ff7a0901c69..0591de545b81d 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
@@ -34,801 +34,9 @@ void convertSideEffectForCall(mlir::Operation *callOp, bool isNothrow,
mlir::LLVM::MemoryEffectsAttr &memoryEffect,
bool &noUnwind, bool &willReturn);
-class CIRToLLVMAssumeOpLowering
- : public mlir::OpConversionPattern<cir::AssumeOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAssumeAlignedOpLowering
- : public mlir::OpConversionPattern<cir::AssumeAlignedOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeAlignedOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeAlignedOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAssumeSepStorageOpLowering
- : public mlir::OpConversionPattern<cir::AssumeSepStorageOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeSepStorageOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeSepStorageOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitClrsbOpLowering
- : public mlir::OpConversionPattern<cir::BitClrsbOp> {
-public:
- using mlir::OpConversionPattern<cir::BitClrsbOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitClrsbOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitClzOpLowering
- : public mlir::OpConversionPattern<cir::BitClzOp> {
-public:
- using mlir::OpConversionPattern<cir::BitClzOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitClzOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitCtzOpLowering
- : public mlir::OpConversionPattern<cir::BitCtzOp> {
-public:
- using mlir::OpConversionPattern<cir::BitCtzOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitCtzOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitFfsOpLowering
- : public mlir::OpConversionPattern<cir::BitFfsOp> {
-public:
- using mlir::OpConversionPattern<cir::BitFfsOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitFfsOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitParityOpLowering
- : public mlir::OpConversionPattern<cir::BitParityOp> {
-public:
- using mlir::OpConversionPattern<cir::BitParityOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitParityOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitPopcountOpLowering
- : public mlir::OpConversionPattern<cir::BitPopcountOp> {
-public:
- using mlir::OpConversionPattern<cir::BitPopcountOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitPopcountOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitReverseOpLowering
- : public mlir::OpConversionPattern<cir::BitReverseOp> {
-public:
- using mlir::OpConversionPattern<cir::BitReverseOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitReverseOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAtomicCmpXchgLowering
- : public mlir::OpConversionPattern<cir::AtomicCmpXchg> {
-public:
- using mlir::OpConversionPattern<cir::AtomicCmpXchg>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AtomicCmpXchg op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBrCondOpLowering
- : public mlir::OpConversionPattern<cir::BrCondOp> {
-public:
- using mlir::OpConversionPattern<cir::BrCondOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BrCondOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMByteSwapOpLowering
- : public mlir::OpConversionPattern<cir::ByteSwapOp> {
-public:
- using mlir::OpConversionPattern<cir::ByteSwapOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ByteSwapOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
- mlir::DataLayout const &dataLayout;
-
- mlir::Type convertTy(mlir::Type ty) const;
-
-public:
- CIRToLLVMCastOpLowering(const mlir::TypeConverter &typeConverter,
- mlir::MLIRContext *context,
- mlir::DataLayout const &dataLayout)
- : OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
-
- mlir::LogicalResult
- matchAndRewrite(cir::CastOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCopyOpLowering : public mlir::OpConversionPattern<cir::CopyOp> {
-public:
- using mlir::OpConversionPattern<cir::CopyOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::CopyOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCosOpLowering : public mlir::OpConversionPattern<cir::CosOp> {
-public:
- using mlir::OpConversionPattern<cir::CosOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::CosOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMExpectOpLowering
- : public mlir::OpConversionPattern<cir::ExpectOp> {
-public:
- using mlir::OpConversionPattern<cir::ExpectOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ExpectOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMReturnOpLowering
- : public mlir::OpConversionPattern<cir::ReturnOp> {
-public:
- using mlir::OpConversionPattern<cir::ReturnOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ReturnOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMRotateOpLowering
- : public mlir::OpConversionPattern<cir::RotateOp> {
-public:
- using mlir::OpConversionPattern<cir::RotateOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::RotateOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const overri...
[truncated]
|
|
@llvm/pr-subscribers-clangir Author: Sirui Mu (Lancern) ChangesMost lowering patterns have exactly the same class declaration with different names and different
Note that in the incubator we have a similar TableGen code generator that generates LLVM lowering code for CIR builtin ops which has a one-to-one correspondence to LLVM dialect operations. This patch does NOT try to upstream it. Some additional noticeable changes made by this patch:
Patch is 47.18 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/159390.diff 8 Files Affected:
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index 38c4a87f69d6d..f80c9faf708ef 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -78,7 +78,15 @@ class LLVMLoweringInfo {
}
class CIR_Op<string mnemonic, list<Trait> traits = []> :
- Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo;
+ Op<CIR_Dialect, mnemonic, traits>, LLVMLoweringInfo {
+ // Should we generate an LLVM lowering pattern for this op?
+ bit hasLLVMLowering = true;
+ // Is the LLVM lowering pattern for this operation recursive?
+ bit isLLVMLoweringRecursive = false;
+ // Extra class declarations to be included in the generated LLVM lowering
+ // pattern.
+ code extraLLVMLoweringPatternDecl = "";
+}
//===----------------------------------------------------------------------===//
// CastOp
@@ -218,6 +226,10 @@ def CIR_CastOp : CIR_Op<"cast", [
// The input and output types should match the cast kind.
let hasVerifier = 1;
let hasFolder = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::Type convertTy(mlir::Type ty) const;
+ }];
}
@@ -297,6 +309,8 @@ def CIR_ConstantOp : CIR_Op<"const", [
}];
let hasFolder = 1;
+
+ let isLLVMLoweringRecursive = true;
}
//===----------------------------------------------------------------------===//
@@ -613,6 +627,8 @@ def CIR_IfOp : CIR_Op<"if", [
CArg<"BuilderCallbackRef", "buildTerminatedBody">:$thenBuilder,
CArg<"BuilderCallbackRef", "nullptr">:$elseBuilder)>
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -659,6 +675,7 @@ def CIR_ConditionOp : CIR_Op<"condition", [
let arguments = (ins CIR_BoolType:$condition);
let assemblyFormat = " `(` $condition `)` attr-dict ";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -726,6 +743,8 @@ def CIR_YieldOp : CIR_Op<"yield", [
let builders = [
OpBuilder<(ins), [{ /* nothing to do */ }]>,
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -741,6 +760,7 @@ def CIR_BreakOp : CIR_Op<"break", [Terminator]> {
}];
let assemblyFormat = "attr-dict";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -756,6 +776,7 @@ def CIR_ContinueOp : CIR_Op<"continue", [Terminator]> {
}];
let assemblyFormat = "attr-dict";
let hasVerifier = 1;
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -814,6 +835,8 @@ def CIR_ScopeOp : CIR_Op<"scope", [
// Scopes without yielding values.
OpBuilder<(ins "llvm::function_ref<void(mlir::OpBuilder &, mlir::Location)>":$scopeBuilder)>
];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -860,6 +883,8 @@ def CIR_CaseOp : CIR_Op<"case", [
"CaseOpKind":$kind,
"mlir::OpBuilder::InsertPoint &":$insertPoint)>
];
+
+ let hasLLVMLowering = false;
}
def CIR_SwitchOp : CIR_Op<"switch", [
@@ -1025,6 +1050,8 @@ def CIR_SwitchOp : CIR_Op<"switch", [
// This is an expensive and need to be used with caution.
bool isSimpleForm(llvm::SmallVectorImpl<CaseOp> &cases);
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1170,6 +1197,8 @@ def CIR_GotoOp : CIR_Op<"goto", [Terminator]> {
}];
let arguments = (ins StrAttr:$label);
let assemblyFormat = [{ $label attr-dict }];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1185,6 +1214,8 @@ def CIR_LabelOp : CIR_Op<"label", [AlwaysSpeculatable]> {
let arguments = (ins StrAttr:$label);
let assemblyFormat = [{ $label attr-dict }];
let hasVerifier = 1;
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1349,6 +1380,8 @@ def CIR_WhileOp : CIR_WhileOpBase<"while"> {
}
```
}];
+
+ let hasLLVMLowering = false;
}
def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
@@ -1375,6 +1408,8 @@ def CIR_DoWhileOp : CIR_WhileOpBase<"do"> {
}
```
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1442,6 +1477,8 @@ def CIR_ForOp : CIR_LoopOpBase<"for"> {
return llvm::SmallVector<mlir::Region *, 3>{&getCond(), &getBody(), &getStep()};
}
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1480,6 +1517,8 @@ def CIR_CmpOp : CIR_Op<"cmp", [Pure, SameTypeOperands]> {
let assemblyFormat = [{
`(` $kind `,` $lhs `,` $rhs `)` `:` type($lhs) `,` type($result) attr-dict
}];
+
+ let isLLVMLoweringRecursive = true;
}
//===----------------------------------------------------------------------===//
@@ -1550,6 +1589,10 @@ def CIR_BinOp : CIR_Op<"binop", [
}];
let hasVerifier = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::LLVM::IntegerOverflowFlags getIntOverflowFlag(cir::BinOp op) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -1687,6 +1730,8 @@ def CIR_TernaryOp : CIR_Op<"ternary", [
`false` $falseRegion
`)` `:` functional-type(operands, results) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
@@ -1790,6 +1835,20 @@ def CIR_GlobalOp : CIR_Op<"global", [
"cir::GlobalLinkageKind::ExternalLinkage">:$linkage)>];
let hasVerifier = 1;
+
+ let isLLVMLoweringRecursive = true;
+ let extraLLVMLoweringPatternDecl = [{
+ mlir::LogicalResult matchAndRewriteRegionInitializedGlobal(
+ cir::GlobalOp op, mlir::Attribute init,
+ mlir::ConversionPatternRewriter &rewriter) const;
+
+ void setupRegionInitializedLLVMGlobalOp(
+ cir::GlobalOp op, mlir::ConversionPatternRewriter &rewriter) const;
+
+ mutable mlir::LLVM::ComdatOp comdatOp = nullptr;
+ mlir::SymbolRefAttr getComdatAttr(cir::GlobalOp &op,
+ mlir::OpBuilder &builder) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -2340,6 +2399,19 @@ def CIR_FuncOp : CIR_Op<"func", [
let hasCustomAssemblyFormat = 1;
let hasVerifier = 1;
+
+ let extraLLVMLoweringPatternDecl = [{
+ static mlir::StringRef getLinkageAttrNameString() { return "linkage"; }
+
+ void lowerFuncAttributes(
+ cir::FuncOp func, bool filterArgAndResAttrs,
+ mlir::SmallVectorImpl<mlir::NamedAttribute> &result) const;
+
+ mlir::LogicalResult
+ matchAndRewriteAlias(cir::FuncOp op, llvm::StringRef aliasee, mlir::Type ty,
+ OpAdaptor adaptor,
+ mlir::ConversionPatternRewriter &rewriter) const;
+ }];
}
//===----------------------------------------------------------------------===//
@@ -2761,6 +2833,8 @@ class CIR_ArrayInitDestroy<string mnemonic> : CIR_Op<mnemonic> {
regionBuilder($_builder, $_state.location);
}]>
];
+
+ let hasLLVMLowering = false;
}
def CIR_ArrayCtor : CIR_ArrayInitDestroy<"array.ctor"> {
@@ -3380,6 +3454,8 @@ def CIR_ComplexMulOp : CIR_Op<"complex.mul", [
let assemblyFormat = [{
$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
def CIR_ComplexDivOp : CIR_Op<"complex.div", [
@@ -3422,6 +3498,8 @@ def CIR_ComplexDivOp : CIR_Op<"complex.div", [
let assemblyFormat = [{
$lhs `,` $rhs `range` `(` $range `)` `:` qualified(type($result)) attr-dict
}];
+
+ let hasLLVMLowering = false;
}
//===----------------------------------------------------------------------===//
diff --git a/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt b/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
index 6e7f3da4add3e..870f9e3f5d052 100644
--- a/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
+++ b/clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
@@ -20,6 +20,10 @@ mlir_tablegen(CIROpsAttributes.h.inc -gen-attrdef-decls)
mlir_tablegen(CIROpsAttributes.cpp.inc -gen-attrdef-defs)
add_public_tablegen_target(MLIRCIREnumsGen)
+clang_tablegen(CIRLowering.inc -gen-cir-lowering
+ SOURCE CIROps.td
+ TARGET CIRLowering)
+
set(LLVM_TARGET_DEFINITIONS CIRTypeConstraints.td)
mlir_tablegen(CIRTypeConstraints.h.inc -gen-type-constraint-decls)
mlir_tablegen(CIRTypeConstraints.cpp.inc -gen-type-constraint-defs)
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
index 1d7e3df1430ac..e18149a61abd0 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -2463,87 +2463,11 @@ void ConvertCIRToLLVMPass::runOnOperation() {
mlir::RewritePatternSet patterns(&getContext());
- patterns.add<CIRToLLVMReturnOpLowering>(patterns.getContext());
- // This could currently be merged with the group below, but it will get more
- // arguments later, so we'll keep it separate for now.
- patterns.add<CIRToLLVMAllocaOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMLoadOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMStoreOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMGlobalOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMCastOpLowering>(converter, patterns.getContext(), dl);
- patterns.add<CIRToLLVMPtrStrideOpLowering>(converter, patterns.getContext(),
- dl);
- patterns.add<CIRToLLVMInlineAsmOpLowering>(converter, patterns.getContext(),
- dl);
patterns.add<
- // clang-format off
- CIRToLLVMACosOpLowering,
- CIRToLLVMASinOpLowering,
- CIRToLLVMAssumeOpLowering,
- CIRToLLVMAssumeAlignedOpLowering,
- CIRToLLVMAssumeSepStorageOpLowering,
- CIRToLLVMAtomicCmpXchgLowering,
- CIRToLLVMBaseClassAddrOpLowering,
- CIRToLLVMATanOpLowering,
- CIRToLLVMBinOpLowering,
- CIRToLLVMBitClrsbOpLowering,
- CIRToLLVMBitClzOpLowering,
- CIRToLLVMBitCtzOpLowering,
- CIRToLLVMBitFfsOpLowering,
- CIRToLLVMBitParityOpLowering,
- CIRToLLVMBitPopcountOpLowering,
- CIRToLLVMBitReverseOpLowering,
- CIRToLLVMBrCondOpLowering,
- CIRToLLVMBrOpLowering,
- CIRToLLVMByteSwapOpLowering,
- CIRToLLVMCallOpLowering,
- CIRToLLVMCmpOpLowering,
- CIRToLLVMComplexAddOpLowering,
- CIRToLLVMComplexCreateOpLowering,
- CIRToLLVMComplexImagOpLowering,
- CIRToLLVMComplexImagPtrOpLowering,
- CIRToLLVMComplexRealOpLowering,
- CIRToLLVMComplexRealPtrOpLowering,
- CIRToLLVMComplexSubOpLowering,
- CIRToLLVMCopyOpLowering,
- CIRToLLVMCosOpLowering,
- CIRToLLVMConstantOpLowering,
- CIRToLLVMExpectOpLowering,
- CIRToLLVMFAbsOpLowering,
- CIRToLLVMFrameAddrOpLowering,
- CIRToLLVMFuncOpLowering,
- CIRToLLVMGetBitfieldOpLowering,
- CIRToLLVMGetGlobalOpLowering,
- CIRToLLVMGetMemberOpLowering,
- CIRToLLVMReturnAddrOpLowering,
- CIRToLLVMRotateOpLowering,
- CIRToLLVMSelectOpLowering,
- CIRToLLVMSetBitfieldOpLowering,
- CIRToLLVMShiftOpLowering,
- CIRToLLVMStackRestoreOpLowering,
- CIRToLLVMStackSaveOpLowering,
- CIRToLLVMSwitchFlatOpLowering,
- CIRToLLVMThrowOpLowering,
- CIRToLLVMTrapOpLowering,
- CIRToLLVMUnaryOpLowering,
- CIRToLLVMUnreachableOpLowering,
- CIRToLLVMVAArgOpLowering,
- CIRToLLVMVAEndOpLowering,
- CIRToLLVMVAStartOpLowering,
- CIRToLLVMVecCmpOpLowering,
- CIRToLLVMVecCreateOpLowering,
- CIRToLLVMVecExtractOpLowering,
- CIRToLLVMVecInsertOpLowering,
- CIRToLLVMVecShuffleDynamicOpLowering,
- CIRToLLVMVecShuffleOpLowering,
- CIRToLLVMVecSplatOpLowering,
- CIRToLLVMVecTernaryOpLowering,
- CIRToLLVMVTableAddrPointOpLowering,
- CIRToLLVMVTableGetVPtrOpLowering,
- CIRToLLVMVTableGetVirtualFnAddrOpLowering,
- CIRToLLVMVTTAddrPointOpLowering
- // clang-format on
- >(converter, patterns.getContext());
+#define GET_LLVM_LOWERING_PATTERNS_LIST
+#include "clang/CIR/Dialect/IR/CIRLowering.inc"
+#undef GET_LLVM_LOWERING_PATTERNS_LIST
+ >(converter, patterns.getContext(), dl);
processCIRAttrs(module);
diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
index 09ff7a0901c69..0591de545b81d 100644
--- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
+++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
@@ -34,801 +34,9 @@ void convertSideEffectForCall(mlir::Operation *callOp, bool isNothrow,
mlir::LLVM::MemoryEffectsAttr &memoryEffect,
bool &noUnwind, bool &willReturn);
-class CIRToLLVMAssumeOpLowering
- : public mlir::OpConversionPattern<cir::AssumeOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAssumeAlignedOpLowering
- : public mlir::OpConversionPattern<cir::AssumeAlignedOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeAlignedOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeAlignedOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAssumeSepStorageOpLowering
- : public mlir::OpConversionPattern<cir::AssumeSepStorageOp> {
-public:
- using mlir::OpConversionPattern<cir::AssumeSepStorageOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AssumeSepStorageOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitClrsbOpLowering
- : public mlir::OpConversionPattern<cir::BitClrsbOp> {
-public:
- using mlir::OpConversionPattern<cir::BitClrsbOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitClrsbOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitClzOpLowering
- : public mlir::OpConversionPattern<cir::BitClzOp> {
-public:
- using mlir::OpConversionPattern<cir::BitClzOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitClzOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitCtzOpLowering
- : public mlir::OpConversionPattern<cir::BitCtzOp> {
-public:
- using mlir::OpConversionPattern<cir::BitCtzOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitCtzOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitFfsOpLowering
- : public mlir::OpConversionPattern<cir::BitFfsOp> {
-public:
- using mlir::OpConversionPattern<cir::BitFfsOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitFfsOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitParityOpLowering
- : public mlir::OpConversionPattern<cir::BitParityOp> {
-public:
- using mlir::OpConversionPattern<cir::BitParityOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitParityOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitPopcountOpLowering
- : public mlir::OpConversionPattern<cir::BitPopcountOp> {
-public:
- using mlir::OpConversionPattern<cir::BitPopcountOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitPopcountOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBitReverseOpLowering
- : public mlir::OpConversionPattern<cir::BitReverseOp> {
-public:
- using mlir::OpConversionPattern<cir::BitReverseOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BitReverseOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMAtomicCmpXchgLowering
- : public mlir::OpConversionPattern<cir::AtomicCmpXchg> {
-public:
- using mlir::OpConversionPattern<cir::AtomicCmpXchg>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::AtomicCmpXchg op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMBrCondOpLowering
- : public mlir::OpConversionPattern<cir::BrCondOp> {
-public:
- using mlir::OpConversionPattern<cir::BrCondOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::BrCondOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMByteSwapOpLowering
- : public mlir::OpConversionPattern<cir::ByteSwapOp> {
-public:
- using mlir::OpConversionPattern<cir::ByteSwapOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ByteSwapOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
- mlir::DataLayout const &dataLayout;
-
- mlir::Type convertTy(mlir::Type ty) const;
-
-public:
- CIRToLLVMCastOpLowering(const mlir::TypeConverter &typeConverter,
- mlir::MLIRContext *context,
- mlir::DataLayout const &dataLayout)
- : OpConversionPattern(typeConverter, context), dataLayout(dataLayout) {}
-
- mlir::LogicalResult
- matchAndRewrite(cir::CastOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCopyOpLowering : public mlir::OpConversionPattern<cir::CopyOp> {
-public:
- using mlir::OpConversionPattern<cir::CopyOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::CopyOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMCosOpLowering : public mlir::OpConversionPattern<cir::CosOp> {
-public:
- using mlir::OpConversionPattern<cir::CosOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::CosOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMExpectOpLowering
- : public mlir::OpConversionPattern<cir::ExpectOp> {
-public:
- using mlir::OpConversionPattern<cir::ExpectOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ExpectOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMReturnOpLowering
- : public mlir::OpConversionPattern<cir::ReturnOp> {
-public:
- using mlir::OpConversionPattern<cir::ReturnOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::ReturnOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const override;
-};
-
-class CIRToLLVMRotateOpLowering
- : public mlir::OpConversionPattern<cir::RotateOp> {
-public:
- using mlir::OpConversionPattern<cir::RotateOp>::OpConversionPattern;
-
- mlir::LogicalResult
- matchAndRewrite(cir::RotateOp op, OpAdaptor,
- mlir::ConversionPatternRewriter &) const overri...
[truncated]
|
Most lowering patterns have exactly the same class declaration with different
names and different `matchAndRewrite` implementations, yet their declaration
occupies near 1000 lines of code in `LowerToLLVM.h`, making this file difficult
to read and boring to maintain. In this patch, I migrate their declarations to
be generated from `CIROps.td` using `clang-tblgen`. Some extra `CIR_Op` TableGen
fields are introduced to help this:
- The `CIR_Op` class now defines a `bit` field `hasLLVMLowering` which
defaults to `true`. If its value is `true`, `clang-tblgen` would generate an
LLVM lowering pattern declaration for the operation.
- Some LLVM lowering patterns has bounded recursion. This could be enabled by
setting the `isLLVMLoweringRecursive` field in a `CIR_Op` record to `true`.
- Some LLVM lowering patterns have defined additional class members. They
could be listed in the `extraLLVMLoweringPatternDecl` field.
Note that in the incubator we have a similar TableGen code generator that
generates LLVM lowering code for CIR builtin ops which has a one-to-one
correspondence to LLVM dialect operations. This patch does NOT try to upstream
it.
Some additional noticeable changes made by this patch:
- This patch adds the `dataLayout` member to every LLVM lowering pattern class
to make the job easier for a code generator. In the future we might want to
add more members to the lowering patterns, and we will need to update the
code generator to make such changes.
Lancern
force-pushed
the
cir/tablegen-cir-lowering
branch
from
63db52b to
b44f246
Compare
bcardosolopes
approved these changes
Sep 18, 2025
Yes, I'll backport it once this patch gets merged. |
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/198/builds/7968 Here is the relevant piece of the build log for the reference |
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/141/builds/11628 Here is the relevant piece of the build log for the reference |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
4 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Most lowering patterns have exactly the same class declaration with different names and different
matchAndRewriteimplementations, yet their declaration occupies near 1000 lines of code inLowerToLLVM.h, making this file difficult to read and boring to maintain. In this patch, I migrate their declarations to be generated fromCIROps.tdusingclang-tblgen. Some extraCIR_OpTableGen fields are introduced to help this:The
CIR_Opclass now defines abitfieldhasLLVMLoweringwhich defaults totrue. If its value istrue,clang-tblgenwould generate an LLVM lowering pattern declaration for the operation.Some LLVM lowering patterns has bounded recursion. This could be enabled by setting the
isLLVMLoweringRecursivefield in aCIR_Oprecord totrue.Some LLVM lowering patterns have defined additional class members. They could be listed in the
extraLLVMLoweringPatternDeclfield.Note that in the incubator we have a similar TableGen code generator that generates LLVM lowering code for CIR builtin ops which has a one-to-one correspondence to LLVM dialect operations. This patch does NOT try to upstream it.
Some additional noticeable changes made by this patch:
dataLayoutmember to every LLVM lowering pattern class to make the job easier for a code generator. In the future we might want to add more members to the lowering patterns, and we will need to update the code generator to make such changes.