(ARM & AArch64) Optimize 8-bit and 16-bit popcount as special cases

[Explorer09]

This is more of a feature request than a bug.

This is a follow-up of #158741, about an 8-bit popcount operation.

#include <stdint.h>
#if defined(__ARM_NEON)
#include <arm_neon.h>
// My version of 8-bit popcount, which makes smaller code than the built-in.
unsigned int popcount_8(uint8_t x) {
    // Initialize the vector register. Set all lanes at once so that the
    // compiler will not emit instruction to zero-initialize other lanes.
    uint8x8_t v = vdup_n_u8(x);
    // Count the number of set bits for each lane (8-bit) in the vector.
    v = vcnt_u8(v);
    // Get lane 0 and discard lanes 1 to 7. (Return type was uint8_t)
    return vget_lane_u8(v, 0);
}
#endif

unsigned int popcount_8_b(uint8_t x) {
    return (unsigned int)__builtin_popcount(x);
}

With Aarch64 target, you can see the compiled code difference:
(clang trunk-20250918)

popcount_8:
        fmov    s0, w0
        cnt     v0.8b, v0.8b
        umov    w0, v0.b[0]
        ret
popcount_8_b:
        and     w8, w0, #0xff
        fmov    s0, w8
        cnt     v0.8b, v0.8b
        fmov    w0, s0
        ret

(gcc 15.2.0)

popcount_8:
        dup     v31.8b, w0
        cnt     v31.8b, v31.8b
        umov    w0, v31.b[0]
        ret

Comparing to the solution currently done in #158741, I can save even a bitwise AND operation. I think this is the smallest code possible for 8-bit popcount in AArch64 and ARMv7+NEON.

Update: I also reported the issue to GCC.

[llvmbot]

@llvm/issue-subscribers-backend-arm

Author: Kang-Che Sung (宋岡哲) (Explorer09)

This is more of a feature request than a bug.

This is a follow-up of #158741, about an 8-bit popcount operation.

#include <stdint.h>
#if defined(__ARM_NEON)
#include <arm_neon.h>
unsigned int popcount_8(uint8_t x) {
    // Initialize the vector register. Set all lanes at once so that the
    // compiler will not emit instruction to zero-initialize other lanes.
    uint8x8_t v = vdup_n_u8(x);
    // Count the number of set bits for each lane (8-bit) in the vector.
    v = vcnt_u8(v);
    // Get lane 0 and discard lanes 1 to 7. (Return type was uint8_t)
    return vget_lane_u8(v, 0);
}
#endif

unsigned int popcount_8_b(uint8_t x) {
    return (unsigned int)__builtin_popcount(x);
}

With Aarch64 target, you can see the compiled code difference:
(clang trunk-20250918)

popcount_8:
        fmov    s0, w0
        cnt     v0.8b, v0.8b
        umov    w0, v0.b[0]
        ret
popcount_8_b:
        and     w8, w0, #<!-- -->0xff
        fmov    s0, w8
        cnt     v0.8b, v0.8b
        fmov    w0, s0
        ret

(gcc 15.2.0)

popcount_8:
        dup     v31.8b, w0
        cnt     v31.8b, v31.8b
        umov    w0, v31.b[0]
        ret

Comparing to the solution currently done in #158741, I can save even a bitwise AND operation. I think this is the smallest code possible for 8-bit popcount in AArch64 and ARMv7+NEON.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: Kang-Che Sung (宋岡哲) (Explorer09)

This is more of a feature request than a bug.

This is a follow-up of #158741, about an 8-bit popcount operation.

#include <stdint.h>
#if defined(__ARM_NEON)
#include <arm_neon.h>
unsigned int popcount_8(uint8_t x) {
    // Initialize the vector register. Set all lanes at once so that the
    // compiler will not emit instruction to zero-initialize other lanes.
    uint8x8_t v = vdup_n_u8(x);
    // Count the number of set bits for each lane (8-bit) in the vector.
    v = vcnt_u8(v);
    // Get lane 0 and discard lanes 1 to 7. (Return type was uint8_t)
    return vget_lane_u8(v, 0);
}
#endif

unsigned int popcount_8_b(uint8_t x) {
    return (unsigned int)__builtin_popcount(x);
}

With Aarch64 target, you can see the compiled code difference:
(clang trunk-20250918)

popcount_8:
        fmov    s0, w0
        cnt     v0.8b, v0.8b
        umov    w0, v0.b[0]
        ret
popcount_8_b:
        and     w8, w0, #<!-- -->0xff
        fmov    s0, w8
        cnt     v0.8b, v0.8b
        fmov    w0, s0
        ret

(gcc 15.2.0)

popcount_8:
        dup     v31.8b, w0
        cnt     v31.8b, v31.8b
        umov    w0, v31.b[0]
        ret

Comparing to the solution currently done in #158741, I can save even a bitwise AND operation. I think this is the smallest code possible for 8-bit popcount in AArch64 and ARMv7+NEON.

[XChy]

Will take a look in a few days. Guess we can simplify it by demaned bits.

[Explorer09]

While we are at it, here's a 16-bit version of the popcount operation that can be simplified a well:

#include <stdint.h>
#if defined(__ARM_NEON)
#include <arm_neon.h>
unsigned int popcount_16(uint16_t x) {
    uint16x4_t v_h = vdup_n_u16(x);
    uint8x8_t v_b = vcnt_u8(vreinterpret_u8_u16(v_h));
    v_h = vpaddl_u8(v_b);
    return vget_lane_u16(v_h, 0);
}
#endif

unsigned int popcount_16_b(uint16_t x) {
    return (unsigned int)__builtin_popcountg(x);
}

(clang trunk-20250920)

popcount_16:
        dup     v0.4h, w0
        cnt     v0.8b, v0.8b
        uaddlp  v0.4h, v0.8b
        umov    w0, v0.h[0]
        ret
popcount_16_b:
        and     w8, w0, #0xffff
        fmov    s0, w8
        cnt     v0.8b, v0.8b
        addv    b0, v0.8b
        fmov    w0, s0
        ret

The trick is to use pairwise add (VPADDL in ARMv7+NEON or UADDLP in AArch64) instead of ADDV, so that a bitwise AND instruction can be saved.

[XChy]

Well, we have to lower the 8-bit/16-bit popcount specially. Demanded bits won't help here..