[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow F16C CVTPS2PH intrinsics to be used in constexpr

[RKSimon]

__builtin_ia32_vcvtps2ph
__builtin_ia32_vcvtps2ph256

If the rounding mode argument is not using the runtime MXCSR.RC, or the conversion is exact it should be possible for the float to half truncation intrinsics to be performed in constant expressions

/// \param imm
///    An immediate value controlling rounding using bits [2:0]: \n
///    000: Nearest \n
///    001: Down \n
///    010: Up \n
///    011: Truncate \n
///    1XX: Use MXCSR.RC for rounding

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

``` __builtin_ia32_vcvtps2ph __builtin_ia32_vcvtps2ph256 ``` If the rounding mode argument is not using the runtime MXCSR.RC, or the conversion is exact it should be possible for the float to half truncation intrinsics to be performed in constant expressions ``` /// \param imm /// An immediate value controlling rounding using bits [2:0]: \n /// 000: Nearest \n /// 001: Down \n /// 010: Up \n /// 011: Truncate \n /// 1XX: Use MXCSR.RC for rounding ```

[llvmbot]

Hi!

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[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Simon Pilgrim (RKSimon)

``` __builtin_ia32_vcvtps2ph __builtin_ia32_vcvtps2ph256 ``` If the rounding mode argument is not using the runtime MXCSR.RC, or the conversion is exact it should be possible for the float to half truncation intrinsics to be performed in constant expressions ``` /// \param imm /// An immediate value controlling rounding using bits [2:0]: \n /// 000: Nearest \n /// 001: Down \n /// 010: Up \n /// 011: Truncate \n /// 1XX: Use MXCSR.RC for rounding ```

[ericxu233]

Hi @RKSimon . I would like to work on this. Can you please assign this issue to me? Thanks!