[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow shufps/pd shuffles intrinsics to be used in constexp

[RKSimon]

_mm_shuffle_ps / _mm256_shuffle_ps / _mm512_shuffle_ps
_mm_mask_shuffle_ps / _mm256_mask_shuffle_ps / _mm512_mask_shuffle_ps
_mm_maskz_shuffle_ps / _mm256_maskz_shuffle_ps / _mm512_maskz_shuffle_ps

_mm_shuffle_pd / _mm256_shuffle_pd / _mm512_shuffle_pd
_mm_mask_shuffle_pd / _mm256_mask_shuffle_pd / _mm512_mask_shuffle_pd
_mm_maskz_shuffle_pd / _mm256_maskz_shuffle_pd / _mm512_maskz_shuffle_pd

Handle the underlying __builtin_ia32_shufps/pd builtins and add test coverage.

Consult the Intel Intrinsics Guide to understand the nuances of the SHUFPS/PD shuffles - including repetition across lanes, LHS/RHS halves etc. - the expansion in CodeGenFunction::EmitX86BuiltinExpr should help as well.

Ideally this can be done with relatively generically to simplify adding other shuffles in the future.

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

1. Check that no other contributor is working on this issue. If someone is assigned to the issue or claimed to be working on it, ping the person. After one week without a response, the assignee may be changed.
2. Leave a comment indicating that you are working on the issue, or just create a pull request after following the steps below. Mention this issue in the description of the pull request.
3. Fix the issue locally.
4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
5. Create a Git commit.
6. Run git clang-format HEAD~1 to format your changes.
7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

``` _mm_shuffle_ps / _mm256_shuffle_ps / _mm512_shuffle_ps _mm_mask_shuffle_ps / _mm256_mask_shuffle_ps / _mm512_mask_shuffle_ps _mm_maskz_shuffle_ps / _mm256_maskz_shuffle_ps / _mm512_maskz_shuffle_ps

_mm_shuffle_pd / _mm256_shuffle_pd / _mm512_shuffle_pd
_mm_mask_shuffle_pd / _mm256_mask_shuffle_pd / _mm512_mask_shuffle_pd
_mm_maskz_shuffle_pd / _mm256_maskz_shuffle_pd / _mm512_maskz_shuffle_pd

Handle the underlying __builtin_ia32_shufps/pd builtins and add test coverage.

Consult the Intel Intrinsics Guide to understand the nuances of the SHUFPS/PD shuffles - including repetition across lanes, LHS/RHS halves etc. - the expansion in CodeGenFunction::EmitX86BuiltinExpr should help as well.

Ideally this can be done with relatively generically to simplify adding other shuffles in the future.
</details>

[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Simon Pilgrim (RKSimon)

``` _mm_shuffle_ps / _mm256_shuffle_ps / _mm512_shuffle_ps _mm_mask_shuffle_ps / _mm256_mask_shuffle_ps / _mm512_mask_shuffle_ps _mm_maskz_shuffle_ps / _mm256_maskz_shuffle_ps / _mm512_maskz_shuffle_ps

_mm_shuffle_pd / _mm256_shuffle_pd / _mm512_shuffle_pd
_mm_mask_shuffle_pd / _mm256_mask_shuffle_pd / _mm512_mask_shuffle_pd
_mm_maskz_shuffle_pd / _mm256_maskz_shuffle_pd / _mm512_maskz_shuffle_pd

Handle the underlying __builtin_ia32_shufps/pd builtins and add test coverage.

Consult the Intel Intrinsics Guide to understand the nuances of the SHUFPS/PD shuffles - including repetition across lanes, LHS/RHS halves etc. - the expansion in CodeGenFunction::EmitX86BuiltinExpr should help as well.

Ideally this can be done with relatively generically to simplify adding other shuffles in the future.
</details>

[chaitanyav]

@RKSimon can i work on this?

[chaitanyav]

@RKSimon the macros have to be converted to static functions.

[RKSimon]

As long as the builtins are flagged as constexpr it should be fine as macros. See the PSHUFD constexpr support.