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[AArch64PostCoalescer] Propagate undef flag after replacing #163119
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| @llvm/pr-subscribers-backend-aarch64 Author: None (XiaShark) ChangesI encountered a compilation crash issue, and after analysis, it was caused by the AArch64PostCoalescerPass, see https://godbolt.org/z/vPeqeo5Pa. Full diff: https://github.com/llvm/llvm-project/pull/163119.diff 2 Files Affected: 
 diff --git a/llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp b/llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
index cdf2822f3ed9d..a8cb1eb07003f 100644
--- a/llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
@@ -72,6 +72,8 @@ bool AArch64PostCoalescer::runOnMachineFunction(MachineFunction &MF) {
       case AArch64::COALESCER_BARRIER_FPR128: {
         Register Src = MI.getOperand(1).getReg();
         Register Dst = MI.getOperand(0).getReg();
+        if (MRI->hasOneDef(Dst) && !MRI->use_empty(Dst))
+          continue;
         if (Src != Dst)
           MRI->replaceRegWith(Dst, Src);
 
diff --git a/llvm/test/CodeGen/AArch64/aarch64-post-coalescer.ll b/llvm/test/CodeGen/AArch64/aarch64-post-coalescer.ll
new file mode 100644
index 0000000000000..adf6c72f9fb2f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/aarch64-post-coalescer.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=aarch64 -mattr=+sme -stop-ater=aarch64-post-coalescer-pass < %s | FileCheck %s
+
+; CHECK-LABEL: name: bar
+; CHECK: [[dst:%[0-9]+]]:fpr64 = COALESCER_BARRIER_FPR64 undef [[src:%[0-9]+]]
+
+target triple = "aarch64"
+
+declare void @foo(double) "aarch64_pstate_sm_enabled"
+
+define dso_local void @bar(double noundef %a) local_unnamed_addr {
+entry:
+  tail call void @foo(double poison) "aarch64_pstate_sm_enabled"
+  ret void
+}
\ No newline at end of file
 | 
| ✅ With the latest revision this PR passed the undef deprecator. | 
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    | ✅ With the latest revision this PR passed the C/C++ code formatter. | 
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    | ; CHECK-NEXT: MSRpstatesvcrImm1 1, 0, csr_aarch64_smstartstop, implicit-def dead $nzcv, implicit $vg, implicit-def $vg, implicit-def $fpmr | ||
| ; CHECK-NEXT: RET_ReallyLR | ||
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp | ||
| %1:fpr64 = COALESCER_BARRIER_FPR64 undef %1 | 
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nit: would it be sufficient to test only for:
%1:fpr64 = COALESCER_BARRIER_FPR64 undef %1
$d0 = COPY %1
FAKE_USE implicit $d0
without the other machine instructions?
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It's fine, modified
… to MIR This patch adds serialization of AArch64FunctionInfo::HasStreamingModeChanges into MIR.
When replacing the register, if the source register has undef flag, we should propagate the flag to all uses of the destination register.
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LGTM, thank you!
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LGTM! Would you like us to merge this now?
| 
 Sure, thanks! | 
| @XiaShark Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! | 
I encountered a compilation crash issue, and after analysis, it was caused by the AArch64PostCoalescerPass, see https://godbolt.org/z/vPeqeo5Pa.
When replacing the register, if the source register has undef flag, we should propagate the flag to all uses of the destination register.