Skip to content

[X86] setcc-wide-types.ll - cleanup check prefixes NFC #169488

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Merged
merged 1 commit into from
Nov 25, 2025
Merged

[X86] setcc-wide-types.ll - cleanup check prefixes NFC #169488

merged 1 commit into from
Nov 25, 2025
+194 −194

Conversation

@RKSimon
Copy link
Collaborator

@RKSimon RKSimon commented Nov 25, 2025

Match typical prefixes used in x86 SSE/AVX tests

@RKSimon
[X86] setcc-wide-types.ll - cleanup check prefixes NFC
e9b59c9 
Match typical prefixes used in x86 SSE/AVX tests
@RKSimon RKSimon enabled auto-merge (squash) November 25, 2025 11:49
@llvmbot
Copy link
Member

llvmbot commented Nov 25, 2025

@llvm/pr-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

Changes

Match typical prefixes used in x86 SSE/AVX tests

Full diff: https://github.com/llvm/llvm-project/pull/169488.diff

1 Files Affected:

  • (modified) llvm/test/CodeGen/X86/setcc-wide-types.ll (+194-194)
diff --git a/llvm/test/CodeGen/X86/setcc-wide-types.ll b/llvm/test/CodeGen/X86/setcc-wide-types.ll
index 67b516c4f0612..23c3e845f2276 100644
--- a/llvm/test/CodeGen/X86/setcc-wide-types.ll
+++ b/llvm/test/CodeGen/X86/setcc-wide-types.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2     | FileCheck %s --check-prefix=ANY --check-prefix=NO512 --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1   | FileCheck %s --check-prefix=ANY --check-prefix=NO512 --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx      | FileCheck %s --check-prefix=ANY --check-prefix=NO512 --check-prefix=AVXANY --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2     | FileCheck %s --check-prefix=ANY --check-prefix=NO512 --check-prefix=AVXANY --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f  | FileCheck %s --check-prefix=ANY --check-prefix=AVXANY --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefix=ANY --check-prefix=AVXANY --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2     | FileCheck %s --check-prefixes=CHECK,NO512,SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1   | FileCheck %s --check-prefixes=CHECK,NO512,SSE,SSE41
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx      | FileCheck %s --check-prefixes=CHECK,NO512,AVX,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2     | FileCheck %s --check-prefixes=CHECK,NO512,AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f  | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512BW
 
 ; Equality checks of 128/256-bit values can use PMOVMSK or PTEST to avoid scalarization.
 
@@ -26,13 +26,13 @@ define i32 @ne_i128(<2 x i64> %x, <2 x i64> %y) {
 ; SSE41-NEXT:    setne %al
 ; SSE41-NEXT:    retq
 ;
-; AVXANY-LABEL: ne_i128:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vpxor %xmm1, %xmm0, %xmm0
-; AVXANY-NEXT:    xorl %eax, %eax
-; AVXANY-NEXT:    vptest %xmm0, %xmm0
-; AVXANY-NEXT:    setne %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: ne_i128:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    vptest %xmm0, %xmm0
+; AVX-NEXT:    setne %al
+; AVX-NEXT:    retq
   %bcx = bitcast <2 x i64> %x to i128
   %bcy = bitcast <2 x i64> %y to i128
   %cmp = icmp ne i128 %bcx, %bcy
@@ -58,13 +58,13 @@ define i32 @eq_i128(<2 x i64> %x, <2 x i64> %y) {
 ; SSE41-NEXT:    sete %al
 ; SSE41-NEXT:    retq
 ;
-; AVXANY-LABEL: eq_i128:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vpxor %xmm1, %xmm0, %xmm0
-; AVXANY-NEXT:    xorl %eax, %eax
-; AVXANY-NEXT:    vptest %xmm0, %xmm0
-; AVXANY-NEXT:    sete %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: eq_i128:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    vptest %xmm0, %xmm0
+; AVX-NEXT:    sete %al
+; AVX-NEXT:    retq
   %bcx = bitcast <2 x i64> %x to i128
   %bcy = bitcast <2 x i64> %y to i128
   %cmp = icmp eq i128 %bcx, %bcy
@@ -785,17 +785,17 @@ define i32 @ne_i128_pair(ptr %a, ptr %b) {
 ; SSE41-NEXT:    setne %al
 ; SSE41-NEXT:    retq
 ;
-; AVXANY-LABEL: ne_i128_pair:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vmovdqa (%rdi), %xmm0
-; AVXANY-NEXT:    vmovdqa 16(%rdi), %xmm1
-; AVXANY-NEXT:    vpxor 16(%rsi), %xmm1, %xmm1
-; AVXANY-NEXT:    vpxor (%rsi), %xmm0, %xmm0
-; AVXANY-NEXT:    vpor %xmm1, %xmm0, %xmm0
-; AVXANY-NEXT:    xorl %eax, %eax
-; AVXANY-NEXT:    vptest %xmm0, %xmm0
-; AVXANY-NEXT:    setne %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: ne_i128_pair:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovdqa (%rdi), %xmm0
+; AVX-NEXT:    vmovdqa 16(%rdi), %xmm1
+; AVX-NEXT:    vpxor 16(%rsi), %xmm1, %xmm1
+; AVX-NEXT:    vpxor (%rsi), %xmm0, %xmm0
+; AVX-NEXT:    vpor %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    vptest %xmm0, %xmm0
+; AVX-NEXT:    setne %al
+; AVX-NEXT:    retq
   %a0 = load i128, ptr %a
   %b0 = load i128, ptr %b
   %xor1 = xor i128 %a0, %b0
@@ -839,17 +839,17 @@ define i32 @eq_i128_pair(ptr %a, ptr %b) {
 ; SSE41-NEXT:    sete %al
 ; SSE41-NEXT:    retq
 ;
-; AVXANY-LABEL: eq_i128_pair:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vmovdqa (%rdi), %xmm0
-; AVXANY-NEXT:    vmovdqa 16(%rdi), %xmm1
-; AVXANY-NEXT:    vpxor 16(%rsi), %xmm1, %xmm1
-; AVXANY-NEXT:    vpxor (%rsi), %xmm0, %xmm0
-; AVXANY-NEXT:    vpor %xmm1, %xmm0, %xmm0
-; AVXANY-NEXT:    xorl %eax, %eax
-; AVXANY-NEXT:    vptest %xmm0, %xmm0
-; AVXANY-NEXT:    sete %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: eq_i128_pair:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovdqa (%rdi), %xmm0
+; AVX-NEXT:    vmovdqa 16(%rdi), %xmm1
+; AVX-NEXT:    vpxor 16(%rsi), %xmm1, %xmm1
+; AVX-NEXT:    vpxor (%rsi), %xmm0, %xmm0
+; AVX-NEXT:    vpor %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    vptest %xmm0, %xmm0
+; AVX-NEXT:    sete %al
+; AVX-NEXT:    retq
   %a0 = load i128, ptr %a
   %b0 = load i128, ptr %b
   %xor1 = xor i128 %a0, %b0
@@ -1224,90 +1224,90 @@ define i32 @eq_i512_pair(ptr %a, ptr %b) {
 
 ; PR41971: Comparison using vector types is not favorable here.
 define i1 @eq_i128_args(i128 %a, i128 %b) {
-; ANY-LABEL: eq_i128_args:
-; ANY:       # %bb.0:
-; ANY-NEXT:    xorq %rcx, %rsi
-; ANY-NEXT:    xorq %rdx, %rdi
-; ANY-NEXT:    orq %rsi, %rdi
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i128_args:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorq %rcx, %rsi
+; CHECK-NEXT:    xorq %rdx, %rdi
+; CHECK-NEXT:    orq %rsi, %rdi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %r = icmp eq i128 %a, %b
   ret i1 %r
 }
 
 define i1 @eq_i256_args(i256 %a, i256 %b) {
-; ANY-LABEL: eq_i256_args:
-; ANY:       # %bb.0:
-; ANY-NEXT:    xorq %r9, %rsi
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
-; ANY-NEXT:    orq %rsi, %rcx
-; ANY-NEXT:    xorq %r8, %rdi
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
-; ANY-NEXT:    orq %rdi, %rdx
-; ANY-NEXT:    orq %rcx, %rdx
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i256_args:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorq %r9, %rsi
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
+; CHECK-NEXT:    orq %rsi, %rcx
+; CHECK-NEXT:    xorq %r8, %rdi
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
+; CHECK-NEXT:    orq %rdi, %rdx
+; CHECK-NEXT:    orq %rcx, %rdx
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %r = icmp eq i256 %a, %b
   ret i1 %r
 }
 
 define i1 @eq_i512_args(i512 %a, i512 %b) {
-; ANY-LABEL: eq_i512_args:
-; ANY:       # %bb.0:
-; ANY-NEXT:    movq {{[0-9]+}}(%rsp), %rax
-; ANY-NEXT:    movq {{[0-9]+}}(%rsp), %r10
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
-; ANY-NEXT:    orq %r10, %rcx
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r9
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rsi
-; ANY-NEXT:    orq %r9, %rsi
-; ANY-NEXT:    orq %rcx, %rsi
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
-; ANY-NEXT:    orq %rax, %rdx
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r8
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdi
-; ANY-NEXT:    orq %r8, %rdi
-; ANY-NEXT:    orq %rdx, %rdi
-; ANY-NEXT:    orq %rsi, %rdi
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i512_args:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r10
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
+; CHECK-NEXT:    orq %r10, %rcx
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %r9
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rsi
+; CHECK-NEXT:    orq %r9, %rsi
+; CHECK-NEXT:    orq %rcx, %rsi
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
+; CHECK-NEXT:    orq %rax, %rdx
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %r8
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rdi
+; CHECK-NEXT:    orq %r8, %rdi
+; CHECK-NEXT:    orq %rdx, %rdi
+; CHECK-NEXT:    orq %rsi, %rdi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %r = icmp eq i512 %a, %b
   ret i1 %r
 }
 
 define i1 @eq_i128_op(i128 %a, i128 %b) {
-; ANY-LABEL: eq_i128_op:
-; ANY:       # %bb.0:
-; ANY-NEXT:    addq $1, %rdi
-; ANY-NEXT:    adcq $0, %rsi
-; ANY-NEXT:    xorq %rdx, %rdi
-; ANY-NEXT:    xorq %rcx, %rsi
-; ANY-NEXT:    orq %rdi, %rsi
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i128_op:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addq $1, %rdi
+; CHECK-NEXT:    adcq $0, %rsi
+; CHECK-NEXT:    xorq %rdx, %rdi
+; CHECK-NEXT:    xorq %rcx, %rsi
+; CHECK-NEXT:    orq %rdi, %rsi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %a2 = add i128 %a, 1
   %r = icmp eq i128 %a2, %b
   ret i1 %r
 }
 
 define i1 @eq_i256_op(i256 %a, i256 %b) {
-; ANY-LABEL: eq_i256_op:
-; ANY:       # %bb.0:
-; ANY-NEXT:    addq $1, %rdi
-; ANY-NEXT:    adcq $0, %rsi
-; ANY-NEXT:    adcq $0, %rdx
-; ANY-NEXT:    adcq $0, %rcx
-; ANY-NEXT:    xorq %r8, %rdi
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
-; ANY-NEXT:    orq %rdi, %rdx
-; ANY-NEXT:    xorq %r9, %rsi
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
-; ANY-NEXT:    orq %rsi, %rcx
-; ANY-NEXT:    orq %rdx, %rcx
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i256_op:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addq $1, %rdi
+; CHECK-NEXT:    adcq $0, %rsi
+; CHECK-NEXT:    adcq $0, %rdx
+; CHECK-NEXT:    adcq $0, %rcx
+; CHECK-NEXT:    xorq %r8, %rdi
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
+; CHECK-NEXT:    orq %rdi, %rdx
+; CHECK-NEXT:    xorq %r9, %rsi
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
+; CHECK-NEXT:    orq %rsi, %rcx
+; CHECK-NEXT:    orq %rdx, %rcx
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %a2 = add i256 %a, 1
   %r = icmp eq i256 %a2, %b
   ret i1 %r
@@ -1344,93 +1344,93 @@ define i1 @eq_i512_op(i512 %a, i512 %b) {
 ; SSE-NEXT:    sete %al
 ; SSE-NEXT:    retq
 ;
-; AVXANY-LABEL: eq_i512_op:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    movq {{[0-9]+}}(%rsp), %r10
-; AVXANY-NEXT:    movq {{[0-9]+}}(%rsp), %rax
-; AVXANY-NEXT:    addq $1, %rdi
-; AVXANY-NEXT:    adcq $0, %rsi
-; AVXANY-NEXT:    adcq $0, %rdx
-; AVXANY-NEXT:    adcq $0, %rcx
-; AVXANY-NEXT:    adcq $0, %r8
-; AVXANY-NEXT:    adcq $0, %r9
-; AVXANY-NEXT:    adcq $0, %r10
-; AVXANY-NEXT:    adcq $0, %rax
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rsi
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r9
-; AVXANY-NEXT:    orq %rsi, %r9
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
-; AVXANY-NEXT:    orq %rcx, %rax
-; AVXANY-NEXT:    orq %r9, %rax
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
-; AVXANY-NEXT:    orq %rdx, %r10
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r8
-; AVXANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rdi
-; AVXANY-NEXT:    orq %r8, %rdi
-; AVXANY-NEXT:    orq %r10, %rdi
-; AVXANY-NEXT:    orq %rax, %rdi
-; AVXANY-NEXT:    sete %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: eq_i512_op:
+; AVX:       # %bb.0:
+; AVX-NEXT:    movq {{[0-9]+}}(%rsp), %r10
+; AVX-NEXT:    movq {{[0-9]+}}(%rsp), %rax
+; AVX-NEXT:    addq $1, %rdi
+; AVX-NEXT:    adcq $0, %rsi
+; AVX-NEXT:    adcq $0, %rdx
+; AVX-NEXT:    adcq $0, %rcx
+; AVX-NEXT:    adcq $0, %r8
+; AVX-NEXT:    adcq $0, %r9
+; AVX-NEXT:    adcq $0, %r10
+; AVX-NEXT:    adcq $0, %rax
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %rsi
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %r9
+; AVX-NEXT:    orq %rsi, %r9
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %rcx
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
+; AVX-NEXT:    orq %rcx, %rax
+; AVX-NEXT:    orq %r9, %rax
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %rdx
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
+; AVX-NEXT:    orq %rdx, %r10
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %r8
+; AVX-NEXT:    xorq {{[0-9]+}}(%rsp), %rdi
+; AVX-NEXT:    orq %r8, %rdi
+; AVX-NEXT:    orq %r10, %rdi
+; AVX-NEXT:    orq %rax, %rdi
+; AVX-NEXT:    sete %al
+; AVX-NEXT:    retq
   %a2 = add i512 %a, 1
   %r = icmp eq i512 %a2, %b
   ret i1 %r
 }
 
 define i1 @eq_i128_load_arg(ptr%p, i128 %b) {
-; ANY-LABEL: eq_i128_load_arg:
-; ANY:       # %bb.0:
-; ANY-NEXT:    xorq 8(%rdi), %rdx
-; ANY-NEXT:    xorq (%rdi), %rsi
-; ANY-NEXT:    orq %rdx, %rsi
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i128_load_arg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorq 8(%rdi), %rdx
+; CHECK-NEXT:    xorq (%rdi), %rsi
+; CHECK-NEXT:    orq %rdx, %rsi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %a = load i128, ptr %p
   %r = icmp eq i128 %a, %b
   ret i1 %r
 }
 
 define i1 @eq_i256_load_arg(ptr%p, i256 %b) {
-; ANY-LABEL: eq_i256_load_arg:
-; ANY:       # %bb.0:
-; ANY-NEXT:    xorq 24(%rdi), %r8
-; ANY-NEXT:    xorq 8(%rdi), %rdx
-; ANY-NEXT:    orq %r8, %rdx
-; ANY-NEXT:    xorq 16(%rdi), %rcx
-; ANY-NEXT:    xorq (%rdi), %rsi
-; ANY-NEXT:    orq %rcx, %rsi
-; ANY-NEXT:    orq %rdx, %rsi
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i256_load_arg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorq 24(%rdi), %r8
+; CHECK-NEXT:    xorq 8(%rdi), %rdx
+; CHECK-NEXT:    orq %r8, %rdx
+; CHECK-NEXT:    xorq 16(%rdi), %rcx
+; CHECK-NEXT:    xorq (%rdi), %rsi
+; CHECK-NEXT:    orq %rcx, %rsi
+; CHECK-NEXT:    orq %rdx, %rsi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %a = load i256, ptr %p
   %r = icmp eq i256 %a, %b
   ret i1 %r
 }
 
 define i1 @eq_i512_load_arg(ptr%p, i512 %b) {
-; ANY-LABEL: eq_i512_load_arg:
-; ANY:       # %bb.0:
-; ANY-NEXT:    movq 40(%rdi), %rax
-; ANY-NEXT:    movq 48(%rdi), %r10
-; ANY-NEXT:    movq 56(%rdi), %r11
-; ANY-NEXT:    xorq 24(%rdi), %r8
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r11
-; ANY-NEXT:    orq %r8, %r11
-; ANY-NEXT:    xorq 8(%rdi), %rdx
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
-; ANY-NEXT:    orq %rdx, %rax
-; ANY-NEXT:    orq %r11, %rax
-; ANY-NEXT:    xorq 32(%rdi), %r9
-; ANY-NEXT:    xorq (%rdi), %rsi
-; ANY-NEXT:    orq %r9, %rsi
-; ANY-NEXT:    xorq 16(%rdi), %rcx
-; ANY-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
-; ANY-NEXT:    orq %rcx, %r10
-; ANY-NEXT:    orq %rsi, %r10
-; ANY-NEXT:    orq %rax, %r10
-; ANY-NEXT:    sete %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: eq_i512_load_arg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq 40(%rdi), %rax
+; CHECK-NEXT:    movq 48(%rdi), %r10
+; CHECK-NEXT:    movq 56(%rdi), %r11
+; CHECK-NEXT:    xorq 24(%rdi), %r8
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %r11
+; CHECK-NEXT:    orq %r8, %r11
+; CHECK-NEXT:    xorq 8(%rdi), %rdx
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT:    orq %rdx, %rax
+; CHECK-NEXT:    orq %r11, %rax
+; CHECK-NEXT:    xorq 32(%rdi), %r9
+; CHECK-NEXT:    xorq (%rdi), %rsi
+; CHECK-NEXT:    orq %r9, %rsi
+; CHECK-NEXT:    xorq 16(%rdi), %rcx
+; CHECK-NEXT:    xorq {{[0-9]+}}(%rsp), %r10
+; CHECK-NEXT:    orq %rcx, %r10
+; CHECK-NEXT:    orq %rsi, %r10
+; CHECK-NEXT:    orq %rax, %r10
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
   %a = load i512, ptr %p
   %r = icmp eq i512 %a, %b
   ret i1 %r
@@ -1439,12 +1439,12 @@ define i1 @eq_i512_load_arg(ptr%p, i512 %b) {
 ; Tests for any/allbits from memory.
 
 define i1 @anybits_i128_load_arg(ptr %w) {
-; ANY-LABEL: anybits_i128_load_arg:
-; ANY:       # %bb.0:
-; ANY-NEXT:    movq (%rdi), %rax
-; ANY-NEXT:    orq 8(%rdi), %rax
-; ANY-NEXT:    setne %al
-; ANY-NEXT:    retq
+; CHECK-LABEL: anybits_i128_load_arg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq (%rdi), %rax
+; CHECK-NEXT:    orq 8(%rdi), %rax
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    retq
   %ld = load i128, ptr %w
   %cmp = icmp ne i128 %ld, 0
   ret i1 %cmp
@@ -1468,13 +1468,13 @@ define i1 @allbits_i128_load_arg(ptr %w) {
 ; SSE41-NEXT:    setb %al
 ; SSE41-NEXT:    retq
 ;
-; AVXANY-LABEL: allbits_i128_load_arg:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vmovdqa (%rdi), %xmm0
-; AVXANY-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; AVXANY-NEXT:    vptest %xmm1, %xmm0
-; AVXANY-NEXT:    setb %al
-; AVXANY-NEXT:    retq
+; AVX-LABEL: allbits_i128_load_arg:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovdqa (%rdi), %xmm0
+; AVX-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    vptest %xmm1, %xmm0
+; AVX-NEXT:    setb %al
+; AVX-NEXT:    retq
   %ld = load i128, ptr %w
   %cmp = icmp eq i128 %ld, -1
   ret i1 %cmp
@@ -1491,13 +1491,13 @@ define i1 @anybits_i256_load_arg(ptr %w) {
 ; SSE-NEXT:    setne %al
 ; SSE-NEXT:    retq
 ;
-; AVXANY-LABEL: anybits_i256_load_arg:
-; AVXANY:       # %bb.0:
-; AVXANY-NEXT:    vmovdqu (%rdi), %ymm0
-; AVXANY-NEXT:    vptest %ymm0, %ymm0
-; AVXANY-NEXT:    setne %al
-; AVXANY-NEXT:    vzeroupper
-; AVXANY-NEXT:    retq
+; AVX-LABEL: anybits_i256_load_arg:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovdqu (%rdi), %ymm0
+; AVX-NEXT:    vptest %ymm0, %ymm0
+; AVX-NEXT:    setne %al
+; AVX-NEXT:    vzeroupper
+; AVX-NEXT:    retq
   %ld = load i256, ptr %w
   %cmp = icmp ne i256 %ld, 0
   ret i1 %cmp

@RKSimon RKSimon merged commit af3af8e into llvm:main Nov 25, 2025
11 of 12 checks passed
@RKSimon RKSimon deleted the x86-setcc-check-prefixes branch November 25, 2025 12:27
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

No reviews

Assignees

No one assigned

Labels

backend:X86

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

2 participants

@RKSimon @llvmbot