From e9255bdf861bfcd7f2c9c069092134c3a49420c0 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 14 Oct 2024 14:31:45 -0700 Subject: [PATCH] [RISCV] Rename rs1_wb to rd in some C instructions. NFC The spec refers to the field as rd'/rs1' so we might as well name the destination rd. --- llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td index 7d742322b4296..d6ba275921b5e 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td @@ -279,9 +279,9 @@ class Bcz funct3, string OpcodeStr, let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in class Shift_right funct2, string OpcodeStr, RegisterClass cls, Operand ImmOpnd> - : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm), + : RVInst16CB<0b100, 0b01, (outs cls:$rd), (ins cls:$rs1, ImmOpnd:$imm), OpcodeStr, "$rs1, $imm"> { - let Constraints = "$rs1 = $rs1_wb"; + let Constraints = "$rs1 = $rd"; let Inst{12} = imm{5}; let Inst{11-10} = funct2; let Inst{6-2} = imm{4-0}; @@ -477,10 +477,10 @@ def C_SRAI : Shift_right<0b01, "c.srai", GPRC, uimmlog2xlennonzero>, Sched<[WriteShiftImm, ReadShiftImm]>; let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in -def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb), (ins GPRC:$rs1, simm6:$imm), +def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rd), (ins GPRC:$rs1, simm6:$imm), "c.andi", "$rs1, $imm">, Sched<[WriteIALU, ReadIALU]> { - let Constraints = "$rs1 = $rs1_wb"; + let Constraints = "$rs1 = $rd"; let Inst{12} = imm{5}; let Inst{11-10} = 0b10; let Inst{6-2} = imm{4-0}; @@ -580,11 +580,11 @@ def C_JALR : RVInst16CR<0b1001, 0b10, (outs), (ins GPRNoX0:$rs1), "c.jalr", "$rs1">, Sched<[WriteJalr, ReadJalr]>; let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in -def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rs1_wb), +def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rd), (ins GPRNoX0:$rs1, GPRNoX0:$rs2), "c.add", "$rs1, $rs2">, Sched<[WriteIALU, ReadIALU, ReadIALU]> { - let Constraints = "$rs1 = $rs1_wb"; + let Constraints = "$rs1 = $rd"; } let Predicates = [HasStdExtCOrZcd, HasStdExtD] in @@ -678,11 +678,11 @@ def C_MV_HINT : RVInst16CR<0b1000, 0b10, (outs GPRX0:$rs1), (ins GPRNoX0:$rs2), let DecoderMethod = "decodeRVCInstrRdRs2"; } -def C_ADD_HINT : RVInst16CR<0b1001, 0b10, (outs GPRX0:$rs1_wb), +def C_ADD_HINT : RVInst16CR<0b1001, 0b10, (outs GPRX0:$rd), (ins GPRX0:$rs1, GPRNoX0:$rs2), "c.add", "$rs1, $rs2">, Sched<[WriteIALU, ReadIALU, ReadIALU]> { - let Constraints = "$rs1 = $rs1_wb"; + let Constraints = "$rs1 = $rd"; let Inst{11-7} = 0; let DecoderMethod = "decodeRVCInstrRdRs1Rs2"; }