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[RISCV] Rename rs1_wb to rd in some C instructions. NFC #112269

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Merged
merged 2 commits into from
Oct 15, 2024
Merged

[RISCV] Rename rs1_wb to rd in some C instructions. NFC #112269

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e9255bd
[RISCV] Rename rs1_wb to rd in some C instructions. NFC
topperc Oct 14, 2024
4621c36
Merge remote-tracking branch 'origin/main' into pr/rs1_wb
topperc Oct 14, 2024
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16 changes: 8 additions & 8 deletions llvm/lib/Target/RISCV/RISCVInstrInfoC.td
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Original file line number Diff line number Diff line change
Expand Up @@ -279,9 +279,9 @@ class Bcz<bits<3> funct3, string OpcodeStr,
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
class Shift_right<bits<2> funct2, string OpcodeStr, RegisterClass cls,
Operand ImmOpnd>
: RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
: RVInst16CB<0b100, 0b01, (outs cls:$rd), (ins cls:$rs1, ImmOpnd:$imm),
OpcodeStr, "$rs1, $imm"> {
let Constraints = "$rs1 = $rs1_wb";
let Constraints = "$rs1 = $rd";
let Inst{12} = imm{5};
let Inst{11-10} = funct2;
let Inst{6-2} = imm{4-0};
Expand Down Expand Up @@ -477,10 +477,10 @@ def C_SRAI : Shift_right<0b01, "c.srai", GPRC, uimmlog2xlennonzero>,
Sched<[WriteShiftImm, ReadShiftImm]>;

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb), (ins GPRC:$rs1, simm6:$imm),
def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rd), (ins GPRC:$rs1, simm6:$imm),
"c.andi", "$rs1, $imm">,
Sched<[WriteIALU, ReadIALU]> {
let Constraints = "$rs1 = $rs1_wb";
let Constraints = "$rs1 = $rd";
let Inst{12} = imm{5};
let Inst{11-10} = 0b10;
let Inst{6-2} = imm{4-0};
Expand Down Expand Up @@ -580,11 +580,11 @@ def C_JALR : RVInst16CR<0b1001, 0b10, (outs), (ins GPRNoX0:$rs1),
"c.jalr", "$rs1">, Sched<[WriteJalr, ReadJalr]>;

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rs1_wb),
def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rd),
(ins GPRNoX0:$rs1, GPRNoX0:$rs2),
"c.add", "$rs1, $rs2">,
Sched<[WriteIALU, ReadIALU, ReadIALU]> {
let Constraints = "$rs1 = $rs1_wb";
let Constraints = "$rs1 = $rd";
}

let Predicates = [HasStdExtCOrZcd, HasStdExtD] in
Expand Down Expand Up @@ -678,11 +678,11 @@ def C_MV_HINT : RVInst16CR<0b1000, 0b10, (outs GPRX0:$rs1), (ins GPRNoX0:$rs2),
let DecoderMethod = "decodeRVCInstrRdRs2";
}

def C_ADD_HINT : RVInst16CR<0b1001, 0b10, (outs GPRX0:$rs1_wb),
def C_ADD_HINT : RVInst16CR<0b1001, 0b10, (outs GPRX0:$rd),
(ins GPRX0:$rs1, GPRNoX0:$rs2),
"c.add", "$rs1, $rs2">,
Sched<[WriteIALU, ReadIALU, ReadIALU]> {
let Constraints = "$rs1 = $rs1_wb";
let Constraints = "$rs1 = $rd";
let Inst{11-7} = 0;
let DecoderMethod = "decodeRVCInstrRdRs1Rs2";
}
Expand Down
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