diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp index f89c78e75d3ee..074a58cadb556 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -16,10 +16,10 @@ using namespace llvm; -void MipsMCAsmInfo::anchor() { } +void MipsELFMCAsmInfo::anchor() {} -MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple, - const MCTargetOptions &Options) { +MipsELFMCAsmInfo::MipsELFMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options) { IsLittleEndian = TheTriple.isLittleEndian(); MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TheTriple, "", Options); diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h index d8bfe58d24a83..b52ed12d3a0e7 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h @@ -18,12 +18,12 @@ namespace llvm { class Triple; -class MipsMCAsmInfo : public MCAsmInfoELF { +class MipsELFMCAsmInfo : public MCAsmInfoELF { void anchor() override; public: - explicit MipsMCAsmInfo(const Triple &TheTriple, - const MCTargetOptions &Options); + explicit MipsELFMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index ca95f67174da1..eff9ecf0d53d3 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -84,7 +84,7 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT, static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options) { - MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); + MCAsmInfo *MAI = new MipsELFMCAsmInfo(TT, Options); unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP); diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp index f4af1d08dde5d..6b07999d862d9 100644 --- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp @@ -730,70 +730,73 @@ printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O) { } void MipsAsmPrinter::emitStartOfAsmFile(Module &M) { - MipsTargetStreamer &TS = getTargetStreamer(); - - // MipsTargetStreamer has an initialization order problem when emitting an - // object file directly (see MipsTargetELFStreamer for full details). Work - // around it by re-initializing the PIC state here. - TS.setPic(OutContext.getObjectFileInfo()->isPositionIndependent()); - - // Try to get target-features from the first function. - StringRef FS = TM.getTargetFeatureString(); - Module::iterator F = M.begin(); - if (FS.empty() && M.size() && F->hasFnAttribute("target-features")) - FS = F->getFnAttribute("target-features").getValueAsString(); - - // Compute MIPS architecture attributes based on the default subtarget - // that we'd have constructed. - // FIXME: For ifunc related functions we could iterate over and look - // for a feature string that doesn't match the default one. const Triple &TT = TM.getTargetTriple(); - StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU()); - const MipsTargetMachine &MTM = static_cast(TM); - const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, std::nullopt); - - bool IsABICalls = STI.isABICalls(); - const MipsABIInfo &ABI = MTM.getABI(); - if (IsABICalls) { - TS.emitDirectiveAbiCalls(); - // FIXME: This condition should be a lot more complicated that it is here. - // Ideally it should test for properties of the ABI and not the ABI - // itself. - // For the moment, I'm only correcting enough to make MIPS-IV work. - if (!isPositionIndependent() && STI.hasSym32()) - TS.emitDirectiveOptionPic0(); - } - // Tell the assembler which ABI we are using - std::string SectionName = std::string(".mdebug.") + getCurrentABIString(); - OutStreamer->switchSection( - OutContext.getELFSection(SectionName, ELF::SHT_PROGBITS, 0)); + if (TT.isOSBinFormatELF()) { + MipsTargetStreamer &TS = getTargetStreamer(); + + // MipsTargetStreamer has an initialization order problem when emitting an + // object file directly (see MipsTargetELFStreamer for full details). Work + // around it by re-initializing the PIC state here. + TS.setPic(OutContext.getObjectFileInfo()->isPositionIndependent()); + + // Try to get target-features from the first function. + StringRef FS = TM.getTargetFeatureString(); + Module::iterator F = M.begin(); + if (FS.empty() && M.size() && F->hasFnAttribute("target-features")) + FS = F->getFnAttribute("target-features").getValueAsString(); + + // Compute MIPS architecture attributes based on the default subtarget + // that we'd have constructed. + // FIXME: For ifunc related functions we could iterate over and look + // for a feature string that doesn't match the default one. + StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU()); + const MipsTargetMachine &MTM = static_cast(TM); + const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, + std::nullopt); + + bool IsABICalls = STI.isABICalls(); + const MipsABIInfo &ABI = MTM.getABI(); + if (IsABICalls) { + TS.emitDirectiveAbiCalls(); + // FIXME: This condition should be a lot more complicated that it is here. + // Ideally it should test for properties of the ABI and not the ABI + // itself. + // For the moment, I'm only correcting enough to make MIPS-IV work. + if (!isPositionIndependent() && STI.hasSym32()) + TS.emitDirectiveOptionPic0(); + } + + // Tell the assembler which ABI we are using + std::string SectionName = std::string(".mdebug.") + getCurrentABIString(); + OutStreamer->switchSection( + OutContext.getELFSection(SectionName, ELF::SHT_PROGBITS, 0)); - // NaN: At the moment we only support: - // 1. .nan legacy (default) - // 2. .nan 2008 - STI.isNaN2008() ? TS.emitDirectiveNaN2008() - : TS.emitDirectiveNaNLegacy(); + // NaN: At the moment we only support: + // 1. .nan legacy (default) + // 2. .nan 2008 + STI.isNaN2008() ? TS.emitDirectiveNaN2008() : TS.emitDirectiveNaNLegacy(); - // TODO: handle O64 ABI + // TODO: handle O64 ABI - TS.updateABIInfo(STI); + TS.updateABIInfo(STI); - // We should always emit a '.module fp=...' but binutils 2.24 does not accept - // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or - // -mfp64) and omit it otherwise. - if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) || - STI.useSoftFloat()) - TS.emitDirectiveModuleFP(); + // We should always emit a '.module fp=...' but binutils 2.24 does not + // accept it. We therefore emit it when it contradicts the ABI defaults + // (-mfpxx or -mfp64) and omit it otherwise. + if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) || + STI.useSoftFloat()) + TS.emitDirectiveModuleFP(); - // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not - // accept it. We therefore emit it when it contradicts the default or an - // option has changed the default (i.e. FPXX) and omit it otherwise. - if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX())) - TS.emitDirectiveModuleOddSPReg(); + // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not + // accept it. We therefore emit it when it contradicts the default or an + // option has changed the default (i.e. FPXX) and omit it otherwise. + if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX())) + TS.emitDirectiveModuleOddSPReg(); - // Switch to the .text section. - OutStreamer->switchSection(getObjFileLowering().getTextSection()); + // Switch to the .text section. + OutStreamer->switchSection(getObjFileLowering().getTextSection()); + } } void MipsAsmPrinter::emitInlineAsmStart() const { diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index 7802767e31c2f..c7dbcc80148ae 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -70,6 +70,10 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() { initializeMipsDAGToDAGISelLegacyPass(*PR); } +static std::unique_ptr createTLOF(const Triple &TT) { + return std::make_unique(); +} + static std::string computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) { @@ -128,7 +132,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, CPU, FS, Options, getEffectiveRelocModel(JIT, RM), getEffectiveCodeModel(CM, CodeModel::Small), OL), - isLittle(isLittle), TLOF(std::make_unique()), + isLittle(isLittle), TLOF(createTLOF(getTargetTriple())), ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt), diff --git a/llvm/test/CodeGen/Mips/no-odd-spreg.ll b/llvm/test/CodeGen/Mips/no-odd-spreg.ll index 467e458ba82db..b6a687dcfe17a 100644 --- a/llvm/test/CodeGen/Mips/no-odd-spreg.ll +++ b/llvm/test/CodeGen/Mips/no-odd-spreg.ll @@ -1,12 +1,12 @@ -; RUN: llc -march=mipsel -mcpu=mips32 < %s \ +; RUN: llc -mtriple=mipsel-elf -mcpu=mips32 < %s \ ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT -; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s \ +; RUN: llc -mtriple=mipsel-elf -mcpu=mips32 -mattr=+nooddspreg < %s \ ; RUN: | FileCheck %s -check-prefixes=ALL,NOODDSPREG -; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64 < %s \ +; RUN: llc -mtriple=mipsel-elf -mcpu=mips32r6 -mattr=fp64 < %s \ ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-NO-EMIT -; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s \ +; RUN: llc -mtriple=mipsel-elf -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s \ ; RUN: | FileCheck %s -check-prefixes=ALL,NOODDSPREG -; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s \ +; RUN: llc -mtriple=mipsel-elf -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s \ ; RUN: | FileCheck %s -check-prefixes=ALL,ODDSPREG,ODDSPREG-EMIT ; We don't emit a directive unless we need to. This is to support versions of