[X86] Make POP imply pointer-size operands, as with PUSH for Intel syntax #114533
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@llvm/pr-subscribers-mc Author: LIU Hao (lhmouse) ChangesOn x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only 32-bit operands, and on x86-64 they assume only 64-bit operands; in neither case should the absence of an operand size be ambiguous. Those special case were added in f6fb780 and lacking of POP seemed an oversight. This closes #114531. Full diff: https://github.com/llvm/llvm-project/pull/114533.diff 3 Files Affected:
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index ae30d4dfc70f53..5a0d98da4146ee 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4495,7 +4495,7 @@ bool X86AsmParser::matchAndEmitIntelInstruction(
// compatible with gas.
StringRef Mnemonic = (static_cast<X86Operand &>(*Operands[0])).getToken();
if (UnsizedMemOp) {
- static const char *const PtrSizedInstrs[] = {"call", "jmp", "push"};
+ static const char *const PtrSizedInstrs[] = {"call", "jmp", "push", "pop"};
for (const char *Instr : PtrSizedInstrs) {
if (Mnemonic == Instr) {
UnsizedMemOp->Mem.Size = getPointerWidth();
diff --git a/llvm/test/MC/X86/intel-syntax-ambiguous.s b/llvm/test/MC/X86/intel-syntax-ambiguous.s
index e90cca820043b5..ea38feefe24591 100644
--- a/llvm/test/MC/X86/intel-syntax-ambiguous.s
+++ b/llvm/test/MC/X86/intel-syntax-ambiguous.s
@@ -30,6 +30,7 @@ sub [eax], 1
// gas assumes these instructions are pointer-sized by default, and we follow
// suit.
push [eax]
+pop [eax]
call [eax]
jmp [eax]
// CHECK-NOT: error:
diff --git a/llvm/test/MC/X86/intel-syntax-ptr-sized.s b/llvm/test/MC/X86/intel-syntax-ptr-sized.s
index a360557eaa6a42..0393d8c84dfba5 100644
--- a/llvm/test/MC/X86/intel-syntax-ptr-sized.s
+++ b/llvm/test/MC/X86/intel-syntax-ptr-sized.s
@@ -6,6 +6,8 @@ push [eax]
// CHECK: pushl (%eax)
call [eax]
// CHECK: calll *(%eax)
+pop [eax]
+// CHECK: popl (%eax)
jmp [eax]
// CHECK: jmpl *(%eax)
@@ -25,6 +27,8 @@ push [eax]
// CHECK: pushw (%eax)
call [eax]
// CHECK: callw *(%eax)
+pop [eax]
+// CHECK: popw (%eax)
jmp [eax]
// CHECK: jmpw *(%eax)
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@llvm/pr-subscribers-backend-x86 Author: LIU Hao (lhmouse) ChangesOn x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only 32-bit operands, and on x86-64 they assume only 64-bit operands; in neither case should the absence of an operand size be ambiguous. Those special case were added in f6fb780 and lacking of POP seemed an oversight. This closes #114531. Full diff: https://github.com/llvm/llvm-project/pull/114533.diff 3 Files Affected:
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index ae30d4dfc70f53..5a0d98da4146ee 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4495,7 +4495,7 @@ bool X86AsmParser::matchAndEmitIntelInstruction(
// compatible with gas.
StringRef Mnemonic = (static_cast<X86Operand &>(*Operands[0])).getToken();
if (UnsizedMemOp) {
- static const char *const PtrSizedInstrs[] = {"call", "jmp", "push"};
+ static const char *const PtrSizedInstrs[] = {"call", "jmp", "push", "pop"};
for (const char *Instr : PtrSizedInstrs) {
if (Mnemonic == Instr) {
UnsizedMemOp->Mem.Size = getPointerWidth();
diff --git a/llvm/test/MC/X86/intel-syntax-ambiguous.s b/llvm/test/MC/X86/intel-syntax-ambiguous.s
index e90cca820043b5..ea38feefe24591 100644
--- a/llvm/test/MC/X86/intel-syntax-ambiguous.s
+++ b/llvm/test/MC/X86/intel-syntax-ambiguous.s
@@ -30,6 +30,7 @@ sub [eax], 1
// gas assumes these instructions are pointer-sized by default, and we follow
// suit.
push [eax]
+pop [eax]
call [eax]
jmp [eax]
// CHECK-NOT: error:
diff --git a/llvm/test/MC/X86/intel-syntax-ptr-sized.s b/llvm/test/MC/X86/intel-syntax-ptr-sized.s
index a360557eaa6a42..0393d8c84dfba5 100644
--- a/llvm/test/MC/X86/intel-syntax-ptr-sized.s
+++ b/llvm/test/MC/X86/intel-syntax-ptr-sized.s
@@ -6,6 +6,8 @@ push [eax]
// CHECK: pushl (%eax)
call [eax]
// CHECK: calll *(%eax)
+pop [eax]
+// CHECK: popl (%eax)
jmp [eax]
// CHECK: jmpl *(%eax)
@@ -25,6 +27,8 @@ push [eax]
// CHECK: pushw (%eax)
call [eax]
// CHECK: callw *(%eax)
+pop [eax]
+// CHECK: popw (%eax)
jmp [eax]
// CHECK: jmpw *(%eax)
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On x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only 32-bit operands, and on x86-64 they assume only 64-bit operands; in neither case should the absence of an operand size be ambiguous. Those special case were added in f6fb780 and lack of POP seemed an oversight. This closes llvm#114531. Signed-off-by: LIU Hao <[email protected]>
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LGTM. This fixes
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MaskRay
changed the title
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Thank you! |
…ntax (llvm#114533) On x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only 32-bit operands, and on x86-64 they assume only 64-bit operands; in neither case should the absence of an operand size be ambiguous. Those special case were added in f6fb780 and lacking of POP seemed an oversight. This closes llvm#114531.
3 participants
On x86-32 the word PUSH (50+rd) and POP (58+rd) instructions assume only 32-bit operands, and on x86-64 they assume only 64-bit operands; in neither case should the absence of an operand size be ambiguous.
Those special case were added in f6fb780 and lacking of POP seemed an oversight.
This closes #114531.