From 20ceb5b4be9bf44f9eadd8fd1a07a5026090794e Mon Sep 17 00:00:00 2001 From: Vitaly Buka Date: Sat, 2 Nov 2024 01:32:00 -0700 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?= =?UTF-8?q?l=20version?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Created using spr 1.3.4 --- llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 2 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 8 ++------ llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 3 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ---- llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 3 --- 5 files changed, 3 insertions(+), 17 deletions(-) diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h index a38dd34a17097..14a641512a67d 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h @@ -1267,7 +1267,7 @@ class MachineIRBuilder { /// \return a MachineInstrBuilder for the newly created instruction. MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, - std::optional Flags = std::nullopt); + std::optional Flgs = std::nullopt); /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1 /// diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h index 739ce05e94734..ae07420479e14 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h @@ -411,14 +411,12 @@ struct SDNodeFlags { NoFPExcept = 1 << 12, // Instructions with attached 'unpredictable' metadata on IR level. Unpredictable = 1 << 13, - // Compare instructions which may carry the samesign flag. - SameSign = 1 << 14, // NOTE: Please update LargestValue in LLVM_DECLARE_ENUM_AS_BITMASK below // the class definition when adding new flags. PoisonGeneratingFlags = NoUnsignedWrap | NoSignedWrap | Exact | Disjoint | - NonNeg | NoNaNs | NoInfs | SameSign, + NonNeg | NoNaNs | NoInfs, }; /// Default constructor turns off all optimization flags. @@ -440,7 +438,6 @@ struct SDNodeFlags { void setNoSignedWrap(bool b) { setFlag(b); } void setExact(bool b) { setFlag(b); } void setDisjoint(bool b) { setFlag(b); } - void setSameSign(bool b) { setFlag(b); } void setNonNeg(bool b) { setFlag(b); } void setNoNaNs(bool b) { setFlag(b); } void setNoInfs(bool b) { setFlag(b); } @@ -457,7 +454,6 @@ struct SDNodeFlags { bool hasNoSignedWrap() const { return Flags & NoSignedWrap; } bool hasExact() const { return Flags & Exact; } bool hasDisjoint() const { return Flags & Disjoint; } - bool hasSameSign() const { return Flags & SameSign; } bool hasNonNeg() const { return Flags & NonNeg; } bool hasNoNaNs() const { return Flags & NoNaNs; } bool hasNoInfs() const { return Flags & NoInfs; } @@ -477,7 +473,7 @@ struct SDNodeFlags { }; LLVM_DECLARE_ENUM_AS_BITMASK(decltype(SDNodeFlags::None), - SDNodeFlags::SameSign); + SDNodeFlags::Unpredictable); inline SDNodeFlags operator|(SDNodeFlags LHS, SDNodeFlags RHS) { LHS |= RHS; diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 9c7085cc7e7a8..281d1578d0173 100644 --- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -1105,9 +1105,6 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, if (Flags.hasDisjoint()) MI->setFlag(MachineInstr::MIFlag::Disjoint); - - if (Flags.hasSameSign()) - MI->setFlag(MachineInstr::MIFlag::SameSign); } // Emit all of the actual operands of this instruction, adding them to the diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index bfe7bbe534db5..a2d7b24c4ba03 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -3652,10 +3652,6 @@ void SelectionDAGBuilder::visitICmp(const ICmpInst &I) { Op2 = DAG.getPtrExtOrTrunc(Op2, getCurSDLoc(), MemVT); } - SDNodeFlags Flags; - Flags.setSameSign(I.hasSameSign()); - SelectionDAG::FlagInserter FlagsInserter(DAG, Flags); - EVT DestVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), I.getType()); setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode)); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index 580ff19065557..703efb7008974 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -653,9 +653,6 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { if (getFlags().hasDisjoint()) OS << " disjoint"; - if (getFlags().hasSameSign()) - OS << " samesign"; - if (getFlags().hasNonNeg()) OS << " nneg";