diff --git a/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td b/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td index 51aa003139fba..a9e3c6766d121 100644 --- a/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td +++ b/llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td @@ -443,12 +443,16 @@ foreach mx = SchedMxListW in { } } -// Worst case needs 64 cycles if SEW is equal to 64. +// Worst case needs 51/45/42/72 * lmul cycles for i8/16/32/64. foreach mx = SchedMxList in { foreach sew = SchedSEWSet.val in { defvar LMulLat = SiFiveP600GetLMulCycles.c; defvar IsWorstCase = SiFiveP600IsWorstCaseMXSEW.c; - let Latency = 64, ReleaseAtCycles = [LMulLat, !mul(63, LMulLat)] in { + defvar DivMicroOpLat = + !cond(!eq(sew, 8): 51, !eq(sew, 16): 45, !eq(sew, 32): 42, + /* SEW=64 */ true: 72); + defvar DivLatency = !mul(DivMicroOpLat, LMulLat); + let Latency = DivLatency, ReleaseAtCycles = [LMulLat, DivLatency] in { defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SiFiveP600VEXQ1, SiFiveP600VDiv], mx, sew, IsWorstCase>; defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SiFiveP600VEXQ1, SiFiveP600VDiv], mx, sew, IsWorstCase>; } @@ -583,12 +587,15 @@ foreach mx = SchedMxListFW in { } } -// Worst case needs 76 cycles if SEW is equal to 64. +// Worst case needs around 29/25/37 * LMUL cycles for f16/32/64. foreach mx = SchedMxListF in { foreach sew = SchedSEWSet.val in { defvar LMulLat = SiFiveP600GetLMulCycles.c; defvar IsWorstCase = SiFiveP600IsWorstCaseMXSEW.c; - let Latency = 76, ReleaseAtCycles = [LMulLat, !mul(76, LMulLat)] in { + defvar DivMicroOpLat = + !cond(!eq(sew, 16): 29, !eq(sew, 32): 25, /* SEW=64 */ true: 37); + defvar DivLatency = !mul(DivMicroOpLat, LMulLat); + let Latency = DivLatency, ReleaseAtCycles = [LMulLat, DivLatency] in { defm "" : LMULSEWWriteResMXSEW<"WriteVFDivV", [SiFiveP600VEXQ1, SiFiveP600VFloatDiv], mx, sew, IsWorstCase>; defm "" : LMULSEWWriteResMXSEW<"WriteVFDivF", [SiFiveP600VEXQ1, SiFiveP600VFloatDiv], mx, sew, IsWorstCase>; defm "" : LMULSEWWriteResMXSEW<"WriteVFSqrtV", [SiFiveP600VEXQ1, SiFiveP600VFloatDiv], mx, sew, IsWorstCase>; diff --git a/llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s b/llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s new file mode 100644 index 0000000000000..0b7cc95dcb8d6 --- /dev/null +++ b/llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s @@ -0,0 +1,1012 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p670 -iterations=1 < %s | FileCheck %s + +vsetvli zero, zero, e8, mf8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, mf4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, mf2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf8, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m1, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m2, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m4, tu, mu +vdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m8, tu, mu +vdiv.vv v8, v16, v24 + +vsetvli zero, zero, e8, mf8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, mf4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, mf2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, m2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, m4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e8, m8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, mf8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, mf4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, mf2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, m2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, m4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e16, m8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, mf8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, mf4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, mf2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, m2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, m4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e32, m8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, mf8, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, mf4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, mf2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, m1, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, m2, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, m4, tu, mu +vdiv.vx v8, v16, a0 +vsetvli zero, zero, e64, m8, tu, mu +vdiv.vx v8, v16, a0 + +vsetvli zero, zero, e8, mf8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, mf4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, mf2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e8, m8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, mf2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e16, m8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, mf2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e32, m8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf8, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, mf2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m1, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m2, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m4, tu, mu +vfdiv.vv v8, v16, v24 +vsetvli zero, zero, e64, m8, tu, mu +vfdiv.vv v8, v16, v24 + +vsetvli zero, zero, e8, mf8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, mf4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, mf2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, m2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, m4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e8, m8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, mf8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, mf4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, mf2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, m2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, m4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e16, m8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, mf8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, mf4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, mf2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, m2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, m4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e32, m8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, mf8, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, mf4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, mf2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, m1, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, m2, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, m4, tu, mu +vfdiv.vf v8, v16, fa0 +vsetvli zero, zero, e64, m8, tu, mu +vfdiv.vf v8, v16, fa0 + +vsetvli zero, zero, e8, mf8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, mf4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, mf2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, m2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, m4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e8, m8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, mf8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, mf4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, mf2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, m2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, m4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e16, m8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, mf8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, mf4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, mf2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, m2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, m4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e32, m8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, mf8, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, mf4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, mf2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, m1, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, m2, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, m4, tu, mu +vfsqrt.v v8, v16 +vsetvli zero, zero, e64, m8, tu, mu +vfsqrt.v v8, v16 + +# CHECK: Iterations: 1 +# CHECK-NEXT: Instructions: 320 +# CHECK-NEXT: Total Cycles: 14613 +# CHECK-NEXT: Total uOps: 320 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.02 +# CHECK-NEXT: IPC: 0.02 +# CHECK-NEXT: Block RThroughput: 14361.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: 1 102 102.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: 1 204 204.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: 1 90 90.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: 1 180 180.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: 1 360 360.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: 1 84 84.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: 1 168 168.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: 1 336 336.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 72 72.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 72 72.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: 1 144 144.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: 1 288 288.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: 1 576 576.00 vdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 51 51.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: 1 102 102.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: 1 204 204.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 45 45.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: 1 90 90.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: 1 180 180.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: 1 360 360.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 42 42.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: 1 84 84.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: 1 168 168.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: 1 336 336.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: 1 408 408.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 72 72.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 72 72.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: 1 144 144.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: 1 288 288.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: 1 576 576.00 vdiv.vx v8, v16, a0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: 1 58 58.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: 1 116 116.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: 1 50 50.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: 1 100 100.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: 1 200 200.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: 1 74 74.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: 1 148 148.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: 1 296 296.00 vfdiv.vv v8, v16, v24 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: 1 58 58.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: 1 116 116.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: 1 50 50.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: 1 100 100.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: 1 200 200.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: 1 74 74.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: 1 148 148.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: 1 296 296.00 vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: 1 29 29.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: 1 29 29.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: 1 29 29.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: 1 58 58.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: 1 116 116.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: 1 25 25.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: 1 25 25.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: 1 50 50.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: 1 100 100.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: 1 200 200.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: 1 232 232.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: 1 37 37.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: 1 74 74.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: 1 148 148.00 vfsqrt.v v8, v16 +# CHECK-NEXT: 1 1 1.00 U vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: 1 296 296.00 vfsqrt.v v8, v16 + +# CHECK: Resources: +# CHECK-NEXT: [0] - SiFiveP600Div +# CHECK-NEXT: [1] - SiFiveP600FEXQ0 +# CHECK-NEXT: [2] - SiFiveP600FEXQ1 +# CHECK-NEXT: [3] - SiFiveP600FloatDiv +# CHECK-NEXT: [4] - SiFiveP600IEXQ0 +# CHECK-NEXT: [5] - SiFiveP600IEXQ1 +# CHECK-NEXT: [6] - SiFiveP600IEXQ2 +# CHECK-NEXT: [7] - SiFiveP600IEXQ3 +# CHECK-NEXT: [8.0] - SiFiveP600LDST +# CHECK-NEXT: [8.1] - SiFiveP600LDST +# CHECK-NEXT: [9] - SiFiveP600VDiv +# CHECK-NEXT: [10] - SiFiveP600VEXQ0 +# CHECK-NEXT: [11] - SiFiveP600VEXQ1 +# CHECK-NEXT: [12] - SiFiveP600VFloatDiv +# CHECK-NEXT: [13] - SiFiveP600VLD +# CHECK-NEXT: [14] - SiFiveP600VST + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [9] [10] [11] [12] [13] [14] +# CHECK-NEXT: - - - - 160.00 - - - - - 12186.00 - 725.00 14361.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8.0] [8.1] [9] [10] [11] [12] [13] [14] Instructions: +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 102.00 - 2.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 204.00 - 4.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 90.00 - 2.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 180.00 - 4.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 360.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 84.00 - 2.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 168.00 - 4.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 336.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 144.00 - 2.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 288.00 - 4.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 576.00 - 8.00 - - - vdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 51.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 102.00 - 2.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 204.00 - 4.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 45.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 90.00 - 2.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 180.00 - 4.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 360.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 42.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 84.00 - 2.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 168.00 - 4.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 336.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 408.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - 72.00 - 1.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - 144.00 - 2.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - 288.00 - 4.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - 576.00 - 8.00 - - - vdiv.vx v8, v16, a0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 58.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 116.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 50.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 100.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 200.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 74.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 148.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 296.00 - - vfdiv.vv v8, v16, v24 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 58.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 116.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 50.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 100.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 200.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 74.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 148.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 296.00 - - vfdiv.vf v8, v16, fa0 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e8, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 29.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 58.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 116.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e16, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 25.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 50.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 100.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e32, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 200.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, mf2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 232.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m1, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 1.00 37.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m2, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 2.00 74.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m4, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 4.00 148.00 - - vfsqrt.v v8, v16 +# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - vsetvli zero, zero, e64, m8, tu, mu +# CHECK-NEXT: - - - - - - - - - - - - 8.00 296.00 - - vfsqrt.v v8, v16