[RISCV] Add +unaligned-scalar-mem to spacemit-x60 #115125
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I can't find any official documentation on this, but from earlier discussions[^1] and my own testing the spacemit-x60 seems to support unaligned scalar loads and stores. They seem to be performant, and just from a quick test we get a 2.45% speedup on 500.perlbench_r[^2]. [1]: llvm#110454 (comment) [2]: https://lnt.lukelau.me/db_default/v4/nts/32
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@llvm/pr-subscribers-backend-risc-v Author: Luke Lau (lukel97) ChangesI can't find any official documentation on this, but from other discussions1 and my own testing the spacemit-x60 seems to support unaligned scalar loads and stores. They seem to be performant, and just from a quick test we get a 2.45% speedup on 500.perlbench_r on the Banana Pi F32. This would allow it to take advantage of #107548. Full diff: https://github.com/llvm/llvm-project/pull/115125.diff 1 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVProcessors.td b/llvm/lib/Target/RISCV/RISCVProcessors.td
index 5277752a38ad9e..e52a856183678a 100644
--- a/llvm/lib/Target/RISCV/RISCVProcessors.td
+++ b/llvm/lib/Target/RISCV/RISCVProcessors.td
@@ -476,7 +476,8 @@ def SPACEMIT_X60 : RISCVProcessorModel<"spacemit-x60",
FeatureStdExtZicond,
FeatureStdExtZvfh,
FeatureStdExtZvkt,
- FeatureStdExtZvl256b]),
+ FeatureStdExtZvl256b,
+ FeatureUnalignedScalarMem]),
[TuneDLenFactor2,
TuneOptimizedNF2SegmentLoadStore,
TuneOptimizedNF3SegmentLoadStore,
Footnotes |
wangpc-pp
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Nov 6, 2024
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LGTM.
(I confirmed this before, unaligned scalar access is supported but vector is not)
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I can't find any official documentation on this, but from other discussions1 and my own testing the spacemit-x60 seems to support unaligned scalar loads and stores.
They seem to be performant, and just from a quick test we get a 2.45% speedup on 500.perlbench_r on the Banana Pi F32.
This would allow it to take advantage of #107548.
Footnotes
https://github.com/llvm/llvm-project/issues/110454#issuecomment-2382199460 ↩
https://lnt.lukelau.me/db_default/v4/nts/32 ↩