diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h index 6edd3474d4eda..fac46f215a373 100644 --- a/clang/lib/Basic/Targets/AMDGPU.h +++ b/clang/lib/Basic/Targets/AMDGPU.h @@ -462,6 +462,14 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { } bool hasHIPImageSupport() const override { return HasImage; } + + std::pair hardwareInterferenceSizes() const override { + // This is imprecise as the value can vary between 64, 128 (even 256!) bytes + // depending on the level of cache and the target architecture. We select + // the size that corresponds to the largest L1 cache line for all + // architectures. + return std::make_pair(128, 128); + } }; } // namespace targets diff --git a/clang/test/Driver/amdgpu-macros.cl b/clang/test/Driver/amdgpu-macros.cl index dd5a4483e4d60..2fedd10bb5344 100644 --- a/clang/test/Driver/amdgpu-macros.cl +++ b/clang/test/Driver/amdgpu-macros.cl @@ -153,6 +153,8 @@ // ARCH-GCN-DAG: #define __[[FAMILY]]__ 1 // ARCH-GCN-DAG: #define __amdgcn_processor__ "[[CPU]]" // ARCH-GCN-DAG: #define __AMDGCN_WAVEFRONT_SIZE [[WAVEFRONT_SIZE]] +// ARCH-GCN-DAG: #define __GCC_DESTRUCTIVE_SIZE 128 +// ARCH-GCN-DAG: #define __GCC_CONSTRUCTIVE_SIZE 128 // UNSAFEFPATOMIC-DAG: #define __AMDGCN_UNSAFE_FP_ATOMICS__ 1 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx906 -mwavefrontsize64 \