[GlobalISel] Import llvm.stepvector #115721

tschuett · 2024-11-11T14:45:59Z

No description provided.

llvmbot · 2024-11-11T14:46:33Z

@llvm/pr-subscribers-llvm-globalisel

@llvm/pr-subscribers-backend-aarch64

Author: Thorsten Schütt (tschuett)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/115721.diff

3 Files Affected:

(modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+4)
(modified) llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp (+3-2)
(added) llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll (+46)

diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 056f4f41ffca79..05a7e195e95ba7 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -2597,6 +2597,10 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
     return translateExtractVector(CI, MIRBuilder);
   case Intrinsic::vector_insert:
     return translateInsertVector(CI, MIRBuilder);
+  case Intrinsic::stepvector: {
+    MIRBuilder.buildStepVector(getOrCreateVReg(CI), 1);
+    return true;
+  }
   case Intrinsic::prefetch: {
     Value *Addr = CI.getOperand(0);
     unsigned RW = cast<ConstantInt>(CI.getOperand(1))->getZExtValue();
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index c5e5c926160e2c..d910e33ac40f65 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -811,8 +811,9 @@ MachineInstrBuilder MachineIRBuilder::buildInsert(const DstOp &Res,
 
 MachineInstrBuilder MachineIRBuilder::buildStepVector(const DstOp &Res,
                                                       unsigned Step) {
-  ConstantInt *CI =
-      ConstantInt::get(getMF().getFunction().getContext(), APInt(64, Step));
+  unsigned Bitwidth = Res.getLLTTy(*getMRI()).getElementType().getSizeInBits();
+  ConstantInt *CI = ConstantInt::get(getMF().getFunction().getContext(),
+                                     APInt(Bitwidth, Step));
   auto StepVector = buildInstr(TargetOpcode::G_STEP_VECTOR);
   StepVector->setDebugLoc(DebugLoc());
   Res.addDefToMIB(*getMRI(), StepVector);
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
new file mode 100644
index 00000000000000..08a1ac3135bd28
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -O0 -mtriple=aarch64-linux-gnu  -mattr=+sve -global-isel -aarch64-enable-gisel-sve=1 -stop-after=irtranslator %s -o - | FileCheck %s
+
+define <vscale x 2 x i64> @call_step_vector_i64() {
+  ; CHECK-LABEL: name: call_step_vector_i64
+  ; CHECK: bb.1.entry:
+  ; CHECK-NEXT:   [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 1
+  ; CHECK-NEXT:   $z0 = COPY [[STEP_VECTOR]](<vscale x 2 x s64>)
+  ; CHECK-NEXT:   RET_ReallyLR implicit $z0
+entry:
+  %steps = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
+  ret <vscale x 2 x i64> %steps
+}
+
+define <vscale x 4 x i32> @call_step_vector_i32() {
+  ; CHECK-LABEL: name: call_step_vector_i32
+  ; CHECK: bb.1.entry:
+  ; CHECK-NEXT:   [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 1
+  ; CHECK-NEXT:   $z0 = COPY [[STEP_VECTOR]](<vscale x 4 x s32>)
+  ; CHECK-NEXT:   RET_ReallyLR implicit $z0
+entry:
+  %steps = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
+  ret <vscale x 4 x i32> %steps
+}
+
+define <vscale x 8 x i16> @call_step_vector_i16() {
+  ; CHECK-LABEL: name: call_step_vector_i16
+  ; CHECK: bb.1.entry:
+  ; CHECK-NEXT:   [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_STEP_VECTOR i16 1
+  ; CHECK-NEXT:   $z0 = COPY [[STEP_VECTOR]](<vscale x 8 x s16>)
+  ; CHECK-NEXT:   RET_ReallyLR implicit $z0
+entry:
+  %steps = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
+  ret <vscale x 8 x i16> %steps
+}
+
+define <vscale x 16 x i8> @call_step_vector_i8() {
+  ; CHECK-LABEL: name: call_step_vector_i8
+  ; CHECK: bb.1.entry:
+  ; CHECK-NEXT:   [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_STEP_VECTOR i8 1
+  ; CHECK-NEXT:   $z0 = COPY [[STEP_VECTOR]](<vscale x 16 x s8>)
+  ; CHECK-NEXT:   RET_ReallyLR implicit $z0
+entry:
+  %steps = call <vscale x 16 x i8> @llvm.stepvector.nxv16i8()
+  ret <vscale x 16 x i8> %steps
+}

arsenm · 2024-11-11T19:55:19Z

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

  case Intrinsic::vector_insert:
    return translateInsertVector(CI, MIRBuilder);
+  case Intrinsic::stepvector: {
+    MIRBuilder.buildStepVector(getOrCreateVReg(CI), 1);


Not sure why this has an operand the intrinsic doesn't but it's already that way. I'm confused by the DAG API, it's one level removed but doing the same thing

The LLVM-IR intrinsic has an implicit factor of one:
https://llvm.org/docs/LangRef.html#llvm-stepvector-intrinsic
For GlobalISel, we have a real factor:
#115598

G_STEP_VECTOR is a cheap name for the AArch64
INDEX (immediates)
instruction.

We and the DAG did the same for the vscale intrinsic:
https://llvm.org/docs/GlobalISel/GenericOpcode.html#g-vscale
The standard vscale pattern takes a scale, while the LLVM-IR intrinsic doesn't:
def : Pat<(vscale GPR64:$scale), (MADDXrrr (UBFMXri (RDVLI_XI 1), 4, 63), $scale, XZR)>;

The difference is probably between LLVM-IR and hardware instructions.

Slightly above:

case Intrinsic::vscale: { MIRBuilder.buildVScale(getOrCreateVReg(CI), 1); return true; }

llvm-ci · 2024-11-11T22:26:16Z

LLVM Buildbot has detected a new failure on builder clang-x86_64-debian-fast running on gribozavr4 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/56/builds/11965

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: Transforms/InstCombine/fcmp-fadd-select.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 2: /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt < /b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll -passes=instcombine -S | /b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck /b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/opt -passes=instcombine -S
+ /b/1/clang-x86_64-debian-fast/llvm.obj/bin/FileCheck /b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll
/b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll:62:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: [[ADD_NEW:%.*]] = fadd nnan nsz <2 x float> [[SEL_NEW]], <float 1.000000e+00, float 1.000000e+00>
              ^
<stdin>:29:99: note: scanning from here
 %sel = call nnan nsz <2 x float> @llvm.maxnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:29:99: note: with "SEL_NEW" equal to "%sel"
 %sel = call nnan nsz <2 x float> @llvm.maxnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:30:2: note: possible intended match here
 %add = fadd nnan nsz <2 x float> %sel, splat (float 1.000000e+00)
 ^
/b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll:130:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: [[ADD_NEW:%.*]] = fadd nnan nsz <2 x float> [[SEL_NEW]], <float 1.000000e+00, float 1.000000e+00>
              ^
<stdin>:59:99: note: scanning from here
 %sel = call nnan nsz <2 x float> @llvm.minnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:59:99: note: with "SEL_NEW" equal to "%sel"
 %sel = call nnan nsz <2 x float> @llvm.minnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:60:2: note: possible intended match here
 %add = fadd nnan nsz <2 x float> %sel, splat (float 1.000000e+00)
 ^
/b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll:198:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: [[ADD_NEW:%.*]] = fadd nnan nsz <2 x float> [[SEL_NEW]], <float 1.000000e+00, float 1.000000e+00>
              ^
<stdin>:89:99: note: scanning from here
 %sel = call nnan nsz <2 x float> @llvm.maxnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:89:99: note: with "SEL_NEW" equal to "%sel"
 %sel = call nnan nsz <2 x float> @llvm.maxnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
<stdin>:90:2: note: possible intended match here
 %add = fadd nnan nsz <2 x float> %sel, splat (float 1.000000e+00)
 ^
/b/1/clang-x86_64-debian-fast/llvm.src/llvm/test/Transforms/InstCombine/fcmp-fadd-select.ll:266:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: [[ADD_NEW:%.*]] = fadd nnan nsz <2 x float> [[SEL_NEW]], <float 1.000000e+00, float 1.000000e+00>
              ^
<stdin>:119:99: note: scanning from here
 %sel = call nnan nsz <2 x float> @llvm.minnum.v2f32(<2 x float> %in, <2 x float> zeroinitializer)
                                                                                                  ^
...

[GlobalISel] Import llvm.stepvector

2986f7e

llvmbot added backend:AArch64 llvm:globalisel labels Nov 11, 2024

arsenm approved these changes Nov 11, 2024

View reviewed changes

Groverkss pushed a commit to iree-org/llvm-project that referenced this pull request Nov 15, 2024

[GlobalISel] Import llvm.stepvector (llvm#115721)

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