diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h index 9035aa3ea3127..2e3507386df30 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAG.h +++ b/llvm/include/llvm/CodeGen/SelectionDAG.h @@ -700,6 +700,10 @@ class SelectionDAG { bool isOpaque = false) { return getConstant(Val, DL, VT, true, isOpaque); } + SDValue getSignedTargetConstant(int64_t Val, const SDLoc &DL, EVT VT, + bool isOpaque = false) { + return getSignedConstant(Val, DL, VT, true, isOpaque); + } /// Create a true or false constant of type \p VT using the target's /// BooleanContent for type \p OpVT. diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h index 6135f96807854..0411a17b4f066 100644 --- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h +++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h @@ -134,6 +134,11 @@ class MipsDAGToDAGISel : public SelectionDAGISel { return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0)); } + inline SDValue getSignedImm(const SDNode *Node, int64_t Imm) { + return CurDAG->getSignedTargetConstant(Imm, SDLoc(Node), + Node->getValueType(0)); + } + virtual void processFunctionAfterISel(MachineFunction &MF) = 0; bool SelectInlineAsmMemoryOperand(const SDValue &Op, diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index f1cc9fd958447..ef2c89f49e875 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2362,9 +2362,9 @@ SDValue MipsTargetLowering::lowerVAARG(SDValue Op, SelectionDAG &DAG) const { ISD::ADD, DL, VAList.getValueType(), VAList, DAG.getConstant(Align.value() - 1, DL, VAList.getValueType())); - VAList = DAG.getNode( - ISD::AND, DL, VAList.getValueType(), VAList, - DAG.getConstant(-(int64_t)Align.value(), DL, VAList.getValueType())); + VAList = DAG.getNode(ISD::AND, DL, VAList.getValueType(), VAList, + DAG.getSignedConstant(-(int64_t)Align.value(), DL, + VAList.getValueType())); } // Increment the pointer, VAList, to the next vaarg. @@ -4291,7 +4291,7 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, EVT Type = Op.getValueType(); int64_t Val = C->getSExtValue(); if (isInt<16>(Val)) { - Result = DAG.getTargetConstant(Val, DL, Type); + Result = DAG.getSignedTargetConstant(Val, DL, Type); break; } } @@ -4321,7 +4321,7 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, EVT Type = Op.getValueType(); int64_t Val = C->getSExtValue(); if ((isInt<32>(Val)) && ((Val & 0xffff) == 0)){ - Result = DAG.getTargetConstant(Val, DL, Type); + Result = DAG.getSignedTargetConstant(Val, DL, Type); break; } } @@ -4331,7 +4331,7 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, EVT Type = Op.getValueType(); int64_t Val = C->getSExtValue(); if ((Val >= -65535) && (Val <= -1)) { - Result = DAG.getTargetConstant(Val, DL, Type); + Result = DAG.getSignedTargetConstant(Val, DL, Type); break; } } @@ -4341,7 +4341,7 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, EVT Type = Op.getValueType(); int64_t Val = C->getSExtValue(); if ((isInt<15>(Val))) { - Result = DAG.getTargetConstant(Val, DL, Type); + Result = DAG.getSignedTargetConstant(Val, DL, Type); break; } } diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 85e3e78d2a4d8..557e6a2c72e27 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -1199,7 +1199,9 @@ def HI16 : SDNodeXForm; // Plus 1. -def Plus1 : SDNodeXFormgetSExtValue() + 1); }]>; +def Plus1 : SDNodeXFormgetSExtValue() + 1); +}]>; // Node immediate is zero (e.g. insve.d) def immz : PatLeaf<(imm), [{ return N->getSExtValue() == 0; }]>;