diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td index 8ff7d0d63469f..82d26e365fb24 100644 --- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td +++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVIntelExtOps.td @@ -131,7 +131,7 @@ class SPIRV_IntelSplitBarrierOp let results = (outs); let assemblyFormat = [{ - $execution_scope `,` $memory_scope `,` $memory_semantics attr-dict + $execution_scope $memory_scope $memory_semantics attr-dict }]; let hasVerifier = 0; @@ -160,7 +160,7 @@ def SPIRV_INTELControlBarrierArriveOp #### Example: ```mlir - spirv.ControlBarrierArrive , , + spirv.ControlBarrierArrive ``` }]; } @@ -194,7 +194,7 @@ def SPIRV_INTELControlBarrierWaitOp #### Example: ```mlir - spirv.ControlBarrierWait , , + spirv.ControlBarrierWait ``` }]; } diff --git a/mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir index a5cae67a3d5c5..359aa350ac90c 100644 --- a/mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir +++ b/mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir @@ -37,12 +37,12 @@ spirv.func @split_barrier() "None" { // CHECK: [[MEMORY:%.*]] = llvm.mlir.constant(2 : i32) : i32 // CHECK: [[SEMANTICS:%.*]] = llvm.mlir.constant(768 : i32) : i32 // CHECK: llvm.call spir_funccc @_Z33__spirv_ControlBarrierArriveINTELiii([[EXECUTION]], [[MEMORY]], [[SEMANTICS]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> () - spirv.INTEL.ControlBarrierArrive , , + spirv.INTEL.ControlBarrierArrive // CHECK: [[EXECUTION:%.*]] = llvm.mlir.constant(2 : i32) : i32 // CHECK: [[MEMORY:%.*]] = llvm.mlir.constant(2 : i32) : i32 // CHECK: [[SEMANTICS:%.*]] = llvm.mlir.constant(256 : i32) : i32 // CHECK: llvm.call spir_funccc @_Z31__spirv_ControlBarrierWaitINTELiii([[EXECUTION]], [[MEMORY]], [[SEMANTICS]]) {convergent, no_unwind, will_return} : (i32, i32, i32) -> () - spirv.INTEL.ControlBarrierWait , , + spirv.INTEL.ControlBarrierWait spirv.Return } diff --git a/mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir b/mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir index 6dd0353d9374a..bb15d018a6c44 100644 --- a/mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir +++ b/mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir @@ -77,10 +77,10 @@ spirv.func @bf16_to_f32_vec_unsupported(%arg0 : vector<2xi16>) "None" { //===----------------------------------------------------------------------===// spirv.func @split_barrier() "None" { - // CHECK: spirv.INTEL.ControlBarrierArrive , , - spirv.INTEL.ControlBarrierArrive , , - // CHECK: spirv.INTEL.ControlBarrierWait , , - spirv.INTEL.ControlBarrierWait , , + // CHECK: spirv.INTEL.ControlBarrierArrive + spirv.INTEL.ControlBarrierArrive + // CHECK: spirv.INTEL.ControlBarrierWait + spirv.INTEL.ControlBarrierWait spirv.Return } diff --git a/mlir/test/Target/SPIRV/intel-ext-ops.mlir b/mlir/test/Target/SPIRV/intel-ext-ops.mlir index 8c50501cf7409..6d2fd324363c6 100644 --- a/mlir/test/Target/SPIRV/intel-ext-ops.mlir +++ b/mlir/test/Target/SPIRV/intel-ext-ops.mlir @@ -40,10 +40,10 @@ spirv.module Logical GLSL450 requires #spirv.vce { // CHECK-LABEL: @split_barrier spirv.func @split_barrier() "None" { - // CHECK: spirv.INTEL.ControlBarrierArrive , , - spirv.INTEL.ControlBarrierArrive , , - // CHECK: spirv.INTEL.ControlBarrierWait , , - spirv.INTEL.ControlBarrierWait , , + // CHECK: spirv.INTEL.ControlBarrierArrive + spirv.INTEL.ControlBarrierArrive + // CHECK: spirv.INTEL.ControlBarrierWait + spirv.INTEL.ControlBarrierWait spirv.Return } }