From af74b16299296660b3c53b447469422339727d95 Mon Sep 17 00:00:00 2001 From: zhijian Date: Wed, 4 Dec 2024 21:29:25 +0000 Subject: [PATCH 1/3] using signed extend value instead of zero extend value for isIntS34Immediate() --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index e917ef3f5e8c9..409d39c681963 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2703,7 +2703,7 @@ bool llvm::isIntS34Immediate(SDNode *N, int64_t &Imm) { if (!isa(N)) return false; - Imm = (int64_t)N->getAsZExtVal(); + Imm = (int64_t)cast(N)->getSExtValue(); return isInt<34>(Imm); } bool llvm::isIntS34Immediate(SDValue Op, int64_t &Imm) { @@ -2925,7 +2925,7 @@ bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp, if (N.getOpcode() == ISD::ADD) { if (!isIntS34Immediate(N.getOperand(1), Imm)) return false; - Disp = DAG.getTargetConstant(Imm, dl, N.getValueType()); + Disp = DAG.getSignedTargetConstant(Imm, dl, N.getValueType()); if (FrameIndexSDNode *FI = dyn_cast(N.getOperand(0))) Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); else @@ -2946,12 +2946,12 @@ bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp, Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); else Base = N.getOperand(0); - Disp = DAG.getTargetConstant(Imm, dl, N.getValueType()); + Disp = DAG.getSignedTargetConstant(Imm, dl, N.getValueType()); return true; } if (isIntS34Immediate(N, Imm)) { // If the address is a 34-bit const. - Disp = DAG.getTargetConstant(Imm, dl, N.getValueType()); + Disp = DAG.getSignedTargetConstant(Imm, dl, N.getValueType()); Base = DAG.getRegister(PPC::ZERO8, N.getValueType()); return true; } From 58f0fd063f65e4255ec0714a55db5fd571663e03 Mon Sep 17 00:00:00 2001 From: zhijian Date: Wed, 4 Dec 2024 21:37:37 +0000 Subject: [PATCH 2/3] add test case --- llvm/test/CodeGen/PowerPC/pr118695.ll | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 llvm/test/CodeGen/PowerPC/pr118695.ll diff --git a/llvm/test/CodeGen/PowerPC/pr118695.ll b/llvm/test/CodeGen/PowerPC/pr118695.ll new file mode 100644 index 0000000000000..bb2d29a37cfa4 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/pr118695.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc-aix- -mcpu=pwr10 | FileCheck %s + +; CHECK: # %bb.0: # %bb +; CHECK-NEXT: lwz 3, L..C0(2) # @dvar +; CHECK-NEXT: plxv 0, -152758(3), 0 +; CHECK-NEXT: stxv 0, 0(0) +; CHECK-NEXT: blr + +%0 = type <{ double }> +@dvar = external global [2352637 x %0] + +define void @Test() { +bb: + %i9 = load <2 x double>, ptr getelementptr inbounds (i8, ptr @dvar, i64 -152758), align 8 + store <2 x double> %i9, ptr null, align 8 + ret void +} From 6ff18cbdb02c03cf08976690cf10000ec02a5314 Mon Sep 17 00:00:00 2001 From: zhijian Date: Wed, 4 Dec 2024 21:52:45 +0000 Subject: [PATCH 3/3] fixed test case --- llvm/test/CodeGen/PowerPC/pr118695.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/test/CodeGen/PowerPC/pr118695.ll b/llvm/test/CodeGen/PowerPC/pr118695.ll index bb2d29a37cfa4..719a5d38b02c4 100644 --- a/llvm/test/CodeGen/PowerPC/pr118695.ll +++ b/llvm/test/CodeGen/PowerPC/pr118695.ll @@ -3,7 +3,7 @@ ; CHECK: # %bb.0: # %bb ; CHECK-NEXT: lwz 3, L..C0(2) # @dvar ; CHECK-NEXT: plxv 0, -152758(3), 0 -; CHECK-NEXT: stxv 0, 0(0) +; CHECK-NEXT: stxv 0, 0(3) ; CHECK-NEXT: blr %0 = type <{ double }> @@ -12,6 +12,6 @@ define void @Test() { bb: %i9 = load <2 x double>, ptr getelementptr inbounds (i8, ptr @dvar, i64 -152758), align 8 - store <2 x double> %i9, ptr null, align 8 + store <2 x double> %i9, ptr @dvar, align 8 ret void }