From 18a5edda7c8e774a364f3105a2ad033f509c7be6 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Fri, 6 Dec 2024 14:51:58 +0000 Subject: [PATCH] [AMDGPU] Add assembler/disassembler support for v_dual_dot2acc_f32_bf16 There is still no codegen support because there is no corresponding v_dot2acc_f32_bf16 instruction. --- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 2 +- llvm/lib/Target/AMDGPU/VOPDInstructions.td | 18 +- llvm/test/MC/AMDGPU/gfx11_asm_vopd.s | 216 ++++++++++++++++++ llvm/test/MC/AMDGPU/gfx11_unsupported.s | 3 + .../Disassembler/AMDGPU/gfx11_dasm_vopd.txt | 108 +++++++++ 5 files changed, 335 insertions(+), 12 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index 128c775619118..17fc1493ffdf9 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -1190,7 +1190,7 @@ let Constraints = "$vdst = $src2", defm V_DOT8C_I32_I4 : VOP2Inst<"v_dot8c_i32_i4", VOP_DOT_ACC_I32_I32>; let SubtargetPredicate = HasDot13Insts in - defm V_DOT2C_F32_BF16 : VOP2Inst<"v_dot2c_f32_bf16", VOP_DOT_ACC_F32_V2BF16>; + defm V_DOT2C_F32_BF16 : VOP2Inst_VOPD<"v_dot2c_f32_bf16", VOP_DOT_ACC_F32_V2BF16, 0xd, "v_dot2acc_f32_bf16">; } let AddedComplexity = 30 in { diff --git a/llvm/lib/Target/AMDGPU/VOPDInstructions.td b/llvm/lib/Target/AMDGPU/VOPDInstructions.td index c6af3d67c5600..b89cd8b914f8b 100644 --- a/llvm/lib/Target/AMDGPU/VOPDInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPDInstructions.td @@ -87,12 +87,12 @@ class VOPD_Base