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[NVPTX] Pattern match texture/surface intrinsics (NFCI) #119982

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Merged
merged 4 commits into from
Dec 16, 2024
Merged

[NVPTX] Pattern match texture/surface intrinsics (NFCI) #119982

merged 4 commits into from
Dec 16, 2024

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@s-barannikov
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@s-barannikov s-barannikov commented Dec 14, 2024

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llvmbot commented Dec 14, 2024

@llvm/pr-subscribers-backend-nvptx

Author: Sergei Barannikov (s-barannikov)

Changes

Patch is 150.13 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119982.diff

5 Files Affected:

  • (modified) llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp (-1392)
  • (modified) llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h (-2)
  • (modified) llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp (+6-1070)
  • (modified) llvm/lib/Target/NVPTX/NVPTXISelLowering.h (-357)
  • (modified) llvm/lib/Target/NVPTX/NVPTXIntrinsics.td (+711)
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
index e1fb2d7fcee030..989ec8d02d2f1a 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
@@ -166,351 +166,6 @@ void NVPTXDAGToDAGISel::Select(SDNode *N) {
     if (tryIntrinsicVoid(N))
       return;
     break;
-  case NVPTXISD::Tex1DFloatS32:
-  case NVPTXISD::Tex1DFloatFloat:
-  case NVPTXISD::Tex1DFloatFloatLevel:
-  case NVPTXISD::Tex1DFloatFloatGrad:
-  case NVPTXISD::Tex1DS32S32:
-  case NVPTXISD::Tex1DS32Float:
-  case NVPTXISD::Tex1DS32FloatLevel:
-  case NVPTXISD::Tex1DS32FloatGrad:
-  case NVPTXISD::Tex1DU32S32:
-  case NVPTXISD::Tex1DU32Float:
-  case NVPTXISD::Tex1DU32FloatLevel:
-  case NVPTXISD::Tex1DU32FloatGrad:
-  case NVPTXISD::Tex1DArrayFloatS32:
-  case NVPTXISD::Tex1DArrayFloatFloat:
-  case NVPTXISD::Tex1DArrayFloatFloatLevel:
-  case NVPTXISD::Tex1DArrayFloatFloatGrad:
-  case NVPTXISD::Tex1DArrayS32S32:
-  case NVPTXISD::Tex1DArrayS32Float:
-  case NVPTXISD::Tex1DArrayS32FloatLevel:
-  case NVPTXISD::Tex1DArrayS32FloatGrad:
-  case NVPTXISD::Tex1DArrayU32S32:
-  case NVPTXISD::Tex1DArrayU32Float:
-  case NVPTXISD::Tex1DArrayU32FloatLevel:
-  case NVPTXISD::Tex1DArrayU32FloatGrad:
-  case NVPTXISD::Tex2DFloatS32:
-  case NVPTXISD::Tex2DFloatFloat:
-  case NVPTXISD::Tex2DFloatFloatLevel:
-  case NVPTXISD::Tex2DFloatFloatGrad:
-  case NVPTXISD::Tex2DS32S32:
-  case NVPTXISD::Tex2DS32Float:
-  case NVPTXISD::Tex2DS32FloatLevel:
-  case NVPTXISD::Tex2DS32FloatGrad:
-  case NVPTXISD::Tex2DU32S32:
-  case NVPTXISD::Tex2DU32Float:
-  case NVPTXISD::Tex2DU32FloatLevel:
-  case NVPTXISD::Tex2DU32FloatGrad:
-  case NVPTXISD::Tex2DArrayFloatS32:
-  case NVPTXISD::Tex2DArrayFloatFloat:
-  case NVPTXISD::Tex2DArrayFloatFloatLevel:
-  case NVPTXISD::Tex2DArrayFloatFloatGrad:
-  case NVPTXISD::Tex2DArrayS32S32:
-  case NVPTXISD::Tex2DArrayS32Float:
-  case NVPTXISD::Tex2DArrayS32FloatLevel:
-  case NVPTXISD::Tex2DArrayS32FloatGrad:
-  case NVPTXISD::Tex2DArrayU32S32:
-  case NVPTXISD::Tex2DArrayU32Float:
-  case NVPTXISD::Tex2DArrayU32FloatLevel:
-  case NVPTXISD::Tex2DArrayU32FloatGrad:
-  case NVPTXISD::Tex3DFloatS32:
-  case NVPTXISD::Tex3DFloatFloat:
-  case NVPTXISD::Tex3DFloatFloatLevel:
-  case NVPTXISD::Tex3DFloatFloatGrad:
-  case NVPTXISD::Tex3DS32S32:
-  case NVPTXISD::Tex3DS32Float:
-  case NVPTXISD::Tex3DS32FloatLevel:
-  case NVPTXISD::Tex3DS32FloatGrad:
-  case NVPTXISD::Tex3DU32S32:
-  case NVPTXISD::Tex3DU32Float:
-  case NVPTXISD::Tex3DU32FloatLevel:
-  case NVPTXISD::Tex3DU32FloatGrad:
-  case NVPTXISD::TexCubeFloatFloat:
-  case NVPTXISD::TexCubeFloatFloatLevel:
-  case NVPTXISD::TexCubeS32Float:
-  case NVPTXISD::TexCubeS32FloatLevel:
-  case NVPTXISD::TexCubeU32Float:
-  case NVPTXISD::TexCubeU32FloatLevel:
-  case NVPTXISD::TexCubeArrayFloatFloat:
-  case NVPTXISD::TexCubeArrayFloatFloatLevel:
-  case NVPTXISD::TexCubeArrayS32Float:
-  case NVPTXISD::TexCubeArrayS32FloatLevel:
-  case NVPTXISD::TexCubeArrayU32Float:
-  case NVPTXISD::TexCubeArrayU32FloatLevel:
-  case NVPTXISD::Tld4R2DFloatFloat:
-  case NVPTXISD::Tld4G2DFloatFloat:
-  case NVPTXISD::Tld4B2DFloatFloat:
-  case NVPTXISD::Tld4A2DFloatFloat:
-  case NVPTXISD::Tld4R2DS64Float:
-  case NVPTXISD::Tld4G2DS64Float:
-  case NVPTXISD::Tld4B2DS64Float:
-  case NVPTXISD::Tld4A2DS64Float:
-  case NVPTXISD::Tld4R2DU64Float:
-  case NVPTXISD::Tld4G2DU64Float:
-  case NVPTXISD::Tld4B2DU64Float:
-  case NVPTXISD::Tld4A2DU64Float:
-  case NVPTXISD::TexUnified1DFloatS32:
-  case NVPTXISD::TexUnified1DFloatFloat:
-  case NVPTXISD::TexUnified1DFloatFloatLevel:
-  case NVPTXISD::TexUnified1DFloatFloatGrad:
-  case NVPTXISD::TexUnified1DS32S32:
-  case NVPTXISD::TexUnified1DS32Float:
-  case NVPTXISD::TexUnified1DS32FloatLevel:
-  case NVPTXISD::TexUnified1DS32FloatGrad:
-  case NVPTXISD::TexUnified1DU32S32:
-  case NVPTXISD::TexUnified1DU32Float:
-  case NVPTXISD::TexUnified1DU32FloatLevel:
-  case NVPTXISD::TexUnified1DU32FloatGrad:
-  case NVPTXISD::TexUnified1DArrayFloatS32:
-  case NVPTXISD::TexUnified1DArrayFloatFloat:
-  case NVPTXISD::TexUnified1DArrayFloatFloatLevel:
-  case NVPTXISD::TexUnified1DArrayFloatFloatGrad:
-  case NVPTXISD::TexUnified1DArrayS32S32:
-  case NVPTXISD::TexUnified1DArrayS32Float:
-  case NVPTXISD::TexUnified1DArrayS32FloatLevel:
-  case NVPTXISD::TexUnified1DArrayS32FloatGrad:
-  case NVPTXISD::TexUnified1DArrayU32S32:
-  case NVPTXISD::TexUnified1DArrayU32Float:
-  case NVPTXISD::TexUnified1DArrayU32FloatLevel:
-  case NVPTXISD::TexUnified1DArrayU32FloatGrad:
-  case NVPTXISD::TexUnified2DFloatS32:
-  case NVPTXISD::TexUnified2DFloatFloat:
-  case NVPTXISD::TexUnified2DFloatFloatLevel:
-  case NVPTXISD::TexUnified2DFloatFloatGrad:
-  case NVPTXISD::TexUnified2DS32S32:
-  case NVPTXISD::TexUnified2DS32Float:
-  case NVPTXISD::TexUnified2DS32FloatLevel:
-  case NVPTXISD::TexUnified2DS32FloatGrad:
-  case NVPTXISD::TexUnified2DU32S32:
-  case NVPTXISD::TexUnified2DU32Float:
-  case NVPTXISD::TexUnified2DU32FloatLevel:
-  case NVPTXISD::TexUnified2DU32FloatGrad:
-  case NVPTXISD::TexUnified2DArrayFloatS32:
-  case NVPTXISD::TexUnified2DArrayFloatFloat:
-  case NVPTXISD::TexUnified2DArrayFloatFloatLevel:
-  case NVPTXISD::TexUnified2DArrayFloatFloatGrad:
-  case NVPTXISD::TexUnified2DArrayS32S32:
-  case NVPTXISD::TexUnified2DArrayS32Float:
-  case NVPTXISD::TexUnified2DArrayS32FloatLevel:
-  case NVPTXISD::TexUnified2DArrayS32FloatGrad:
-  case NVPTXISD::TexUnified2DArrayU32S32:
-  case NVPTXISD::TexUnified2DArrayU32Float:
-  case NVPTXISD::TexUnified2DArrayU32FloatLevel:
-  case NVPTXISD::TexUnified2DArrayU32FloatGrad:
-  case NVPTXISD::TexUnified3DFloatS32:
-  case NVPTXISD::TexUnified3DFloatFloat:
-  case NVPTXISD::TexUnified3DFloatFloatLevel:
-  case NVPTXISD::TexUnified3DFloatFloatGrad:
-  case NVPTXISD::TexUnified3DS32S32:
-  case NVPTXISD::TexUnified3DS32Float:
-  case NVPTXISD::TexUnified3DS32FloatLevel:
-  case NVPTXISD::TexUnified3DS32FloatGrad:
-  case NVPTXISD::TexUnified3DU32S32:
-  case NVPTXISD::TexUnified3DU32Float:
-  case NVPTXISD::TexUnified3DU32FloatLevel:
-  case NVPTXISD::TexUnified3DU32FloatGrad:
-  case NVPTXISD::TexUnifiedCubeFloatFloat:
-  case NVPTXISD::TexUnifiedCubeFloatFloatLevel:
-  case NVPTXISD::TexUnifiedCubeS32Float:
-  case NVPTXISD::TexUnifiedCubeS32FloatLevel:
-  case NVPTXISD::TexUnifiedCubeU32Float:
-  case NVPTXISD::TexUnifiedCubeU32FloatLevel:
-  case NVPTXISD::TexUnifiedCubeArrayFloatFloat:
-  case NVPTXISD::TexUnifiedCubeArrayFloatFloatLevel:
-  case NVPTXISD::TexUnifiedCubeArrayS32Float:
-  case NVPTXISD::TexUnifiedCubeArrayS32FloatLevel:
-  case NVPTXISD::TexUnifiedCubeArrayU32Float:
-  case NVPTXISD::TexUnifiedCubeArrayU32FloatLevel:
-  case NVPTXISD::TexUnifiedCubeFloatFloatGrad:
-  case NVPTXISD::TexUnifiedCubeS32FloatGrad:
-  case NVPTXISD::TexUnifiedCubeU32FloatGrad:
-  case NVPTXISD::TexUnifiedCubeArrayFloatFloatGrad:
-  case NVPTXISD::TexUnifiedCubeArrayS32FloatGrad:
-  case NVPTXISD::TexUnifiedCubeArrayU32FloatGrad:
-  case NVPTXISD::Tld4UnifiedR2DFloatFloat:
-  case NVPTXISD::Tld4UnifiedG2DFloatFloat:
-  case NVPTXISD::Tld4UnifiedB2DFloatFloat:
-  case NVPTXISD::Tld4UnifiedA2DFloatFloat:
-  case NVPTXISD::Tld4UnifiedR2DS64Float:
-  case NVPTXISD::Tld4UnifiedG2DS64Float:
-  case NVPTXISD::Tld4UnifiedB2DS64Float:
-  case NVPTXISD::Tld4UnifiedA2DS64Float:
-  case NVPTXISD::Tld4UnifiedR2DU64Float:
-  case NVPTXISD::Tld4UnifiedG2DU64Float:
-  case NVPTXISD::Tld4UnifiedB2DU64Float:
-  case NVPTXISD::Tld4UnifiedA2DU64Float:
-    if (tryTextureIntrinsic(N))
-      return;
-    break;
-  case NVPTXISD::Suld1DI8Clamp:
-  case NVPTXISD::Suld1DI16Clamp:
-  case NVPTXISD::Suld1DI32Clamp:
-  case NVPTXISD::Suld1DI64Clamp:
-  case NVPTXISD::Suld1DV2I8Clamp:
-  case NVPTXISD::Suld1DV2I16Clamp:
-  case NVPTXISD::Suld1DV2I32Clamp:
-  case NVPTXISD::Suld1DV2I64Clamp:
-  case NVPTXISD::Suld1DV4I8Clamp:
-  case NVPTXISD::Suld1DV4I16Clamp:
-  case NVPTXISD::Suld1DV4I32Clamp:
-  case NVPTXISD::Suld1DArrayI8Clamp:
-  case NVPTXISD::Suld1DArrayI16Clamp:
-  case NVPTXISD::Suld1DArrayI32Clamp:
-  case NVPTXISD::Suld1DArrayI64Clamp:
-  case NVPTXISD::Suld1DArrayV2I8Clamp:
-  case NVPTXISD::Suld1DArrayV2I16Clamp:
-  case NVPTXISD::Suld1DArrayV2I32Clamp:
-  case NVPTXISD::Suld1DArrayV2I64Clamp:
-  case NVPTXISD::Suld1DArrayV4I8Clamp:
-  case NVPTXISD::Suld1DArrayV4I16Clamp:
-  case NVPTXISD::Suld1DArrayV4I32Clamp:
-  case NVPTXISD::Suld2DI8Clamp:
-  case NVPTXISD::Suld2DI16Clamp:
-  case NVPTXISD::Suld2DI32Clamp:
-  case NVPTXISD::Suld2DI64Clamp:
-  case NVPTXISD::Suld2DV2I8Clamp:
-  case NVPTXISD::Suld2DV2I16Clamp:
-  case NVPTXISD::Suld2DV2I32Clamp:
-  case NVPTXISD::Suld2DV2I64Clamp:
-  case NVPTXISD::Suld2DV4I8Clamp:
-  case NVPTXISD::Suld2DV4I16Clamp:
-  case NVPTXISD::Suld2DV4I32Clamp:
-  case NVPTXISD::Suld2DArrayI8Clamp:
-  case NVPTXISD::Suld2DArrayI16Clamp:
-  case NVPTXISD::Suld2DArrayI32Clamp:
-  case NVPTXISD::Suld2DArrayI64Clamp:
-  case NVPTXISD::Suld2DArrayV2I8Clamp:
-  case NVPTXISD::Suld2DArrayV2I16Clamp:
-  case NVPTXISD::Suld2DArrayV2I32Clamp:
-  case NVPTXISD::Suld2DArrayV2I64Clamp:
-  case NVPTXISD::Suld2DArrayV4I8Clamp:
-  case NVPTXISD::Suld2DArrayV4I16Clamp:
-  case NVPTXISD::Suld2DArrayV4I32Clamp:
-  case NVPTXISD::Suld3DI8Clamp:
-  case NVPTXISD::Suld3DI16Clamp:
-  case NVPTXISD::Suld3DI32Clamp:
-  case NVPTXISD::Suld3DI64Clamp:
-  case NVPTXISD::Suld3DV2I8Clamp:
-  case NVPTXISD::Suld3DV2I16Clamp:
-  case NVPTXISD::Suld3DV2I32Clamp:
-  case NVPTXISD::Suld3DV2I64Clamp:
-  case NVPTXISD::Suld3DV4I8Clamp:
-  case NVPTXISD::Suld3DV4I16Clamp:
-  case NVPTXISD::Suld3DV4I32Clamp:
-  case NVPTXISD::Suld1DI8Trap:
-  case NVPTXISD::Suld1DI16Trap:
-  case NVPTXISD::Suld1DI32Trap:
-  case NVPTXISD::Suld1DI64Trap:
-  case NVPTXISD::Suld1DV2I8Trap:
-  case NVPTXISD::Suld1DV2I16Trap:
-  case NVPTXISD::Suld1DV2I32Trap:
-  case NVPTXISD::Suld1DV2I64Trap:
-  case NVPTXISD::Suld1DV4I8Trap:
-  case NVPTXISD::Suld1DV4I16Trap:
-  case NVPTXISD::Suld1DV4I32Trap:
-  case NVPTXISD::Suld1DArrayI8Trap:
-  case NVPTXISD::Suld1DArrayI16Trap:
-  case NVPTXISD::Suld1DArrayI32Trap:
-  case NVPTXISD::Suld1DArrayI64Trap:
-  case NVPTXISD::Suld1DArrayV2I8Trap:
-  case NVPTXISD::Suld1DArrayV2I16Trap:
-  case NVPTXISD::Suld1DArrayV2I32Trap:
-  case NVPTXISD::Suld1DArrayV2I64Trap:
-  case NVPTXISD::Suld1DArrayV4I8Trap:
-  case NVPTXISD::Suld1DArrayV4I16Trap:
-  case NVPTXISD::Suld1DArrayV4I32Trap:
-  case NVPTXISD::Suld2DI8Trap:
-  case NVPTXISD::Suld2DI16Trap:
-  case NVPTXISD::Suld2DI32Trap:
-  case NVPTXISD::Suld2DI64Trap:
-  case NVPTXISD::Suld2DV2I8Trap:
-  case NVPTXISD::Suld2DV2I16Trap:
-  case NVPTXISD::Suld2DV2I32Trap:
-  case NVPTXISD::Suld2DV2I64Trap:
-  case NVPTXISD::Suld2DV4I8Trap:
-  case NVPTXISD::Suld2DV4I16Trap:
-  case NVPTXISD::Suld2DV4I32Trap:
-  case NVPTXISD::Suld2DArrayI8Trap:
-  case NVPTXISD::Suld2DArrayI16Trap:
-  case NVPTXISD::Suld2DArrayI32Trap:
-  case NVPTXISD::Suld2DArrayI64Trap:
-  case NVPTXISD::Suld2DArrayV2I8Trap:
-  case NVPTXISD::Suld2DArrayV2I16Trap:
-  case NVPTXISD::Suld2DArrayV2I32Trap:
-  case NVPTXISD::Suld2DArrayV2I64Trap:
-  case NVPTXISD::Suld2DArrayV4I8Trap:
-  case NVPTXISD::Suld2DArrayV4I16Trap:
-  case NVPTXISD::Suld2DArrayV4I32Trap:
-  case NVPTXISD::Suld3DI8Trap:
-  case NVPTXISD::Suld3DI16Trap:
-  case NVPTXISD::Suld3DI32Trap:
-  case NVPTXISD::Suld3DI64Trap:
-  case NVPTXISD::Suld3DV2I8Trap:
-  case NVPTXISD::Suld3DV2I16Trap:
-  case NVPTXISD::Suld3DV2I32Trap:
-  case NVPTXISD::Suld3DV2I64Trap:
-  case NVPTXISD::Suld3DV4I8Trap:
-  case NVPTXISD::Suld3DV4I16Trap:
-  case NVPTXISD::Suld3DV4I32Trap:
-  case NVPTXISD::Suld1DI8Zero:
-  case NVPTXISD::Suld1DI16Zero:
-  case NVPTXISD::Suld1DI32Zero:
-  case NVPTXISD::Suld1DI64Zero:
-  case NVPTXISD::Suld1DV2I8Zero:
-  case NVPTXISD::Suld1DV2I16Zero:
-  case NVPTXISD::Suld1DV2I32Zero:
-  case NVPTXISD::Suld1DV2I64Zero:
-  case NVPTXISD::Suld1DV4I8Zero:
-  case NVPTXISD::Suld1DV4I16Zero:
-  case NVPTXISD::Suld1DV4I32Zero:
-  case NVPTXISD::Suld1DArrayI8Zero:
-  case NVPTXISD::Suld1DArrayI16Zero:
-  case NVPTXISD::Suld1DArrayI32Zero:
-  case NVPTXISD::Suld1DArrayI64Zero:
-  case NVPTXISD::Suld1DArrayV2I8Zero:
-  case NVPTXISD::Suld1DArrayV2I16Zero:
-  case NVPTXISD::Suld1DArrayV2I32Zero:
-  case NVPTXISD::Suld1DArrayV2I64Zero:
-  case NVPTXISD::Suld1DArrayV4I8Zero:
-  case NVPTXISD::Suld1DArrayV4I16Zero:
-  case NVPTXISD::Suld1DArrayV4I32Zero:
-  case NVPTXISD::Suld2DI8Zero:
-  case NVPTXISD::Suld2DI16Zero:
-  case NVPTXISD::Suld2DI32Zero:
-  case NVPTXISD::Suld2DI64Zero:
-  case NVPTXISD::Suld2DV2I8Zero:
-  case NVPTXISD::Suld2DV2I16Zero:
-  case NVPTXISD::Suld2DV2I32Zero:
-  case NVPTXISD::Suld2DV2I64Zero:
-  case NVPTXISD::Suld2DV4I8Zero:
-  case NVPTXISD::Suld2DV4I16Zero:
-  case NVPTXISD::Suld2DV4I32Zero:
-  case NVPTXISD::Suld2DArrayI8Zero:
-  case NVPTXISD::Suld2DArrayI16Zero:
-  case NVPTXISD::Suld2DArrayI32Zero:
-  case NVPTXISD::Suld2DArrayI64Zero:
-  case NVPTXISD::Suld2DArrayV2I8Zero:
-  case NVPTXISD::Suld2DArrayV2I16Zero:
-  case NVPTXISD::Suld2DArrayV2I32Zero:
-  case NVPTXISD::Suld2DArrayV2I64Zero:
-  case NVPTXISD::Suld2DArrayV4I8Zero:
-  case NVPTXISD::Suld2DArrayV4I16Zero:
-  case NVPTXISD::Suld2DArrayV4I32Zero:
-  case NVPTXISD::Suld3DI8Zero:
-  case NVPTXISD::Suld3DI16Zero:
-  case NVPTXISD::Suld3DI32Zero:
-  case NVPTXISD::Suld3DI64Zero:
-  case NVPTXISD::Suld3DV2I8Zero:
-  case NVPTXISD::Suld3DV2I16Zero:
-  case NVPTXISD::Suld3DV2I32Zero:
-  case NVPTXISD::Suld3DV2I64Zero:
-  case NVPTXISD::Suld3DV4I8Zero:
-  case NVPTXISD::Suld3DV4I16Zero:
-  case NVPTXISD::Suld3DV4I32Zero:
-    if (trySurfaceIntrinsic(N))
-      return;
-    break;
   case ISD::AND:
   case ISD::SRA:
   case ISD::SRL:
@@ -2604,1053 +2259,6 @@ bool NVPTXDAGToDAGISel::tryStoreParam(SDNode *N) {
   return true;
 }
 
-bool NVPTXDAGToDAGISel::tryTextureIntrinsic(SDNode *N) {
-  unsigned Opc = 0;
-
-  switch (N->getOpcode()) {
-  default: return false;
-  case NVPTXISD::Tex1DFloatS32:
-    Opc = NVPTX::TEX_1D_F32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DFloatFloat:
-    Opc = NVPTX::TEX_1D_F32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DFloatFloatLevel:
-    Opc = NVPTX::TEX_1D_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DFloatFloatGrad:
-    Opc = NVPTX::TEX_1D_F32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex1DS32S32:
-    Opc = NVPTX::TEX_1D_S32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DS32Float:
-    Opc = NVPTX::TEX_1D_S32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DS32FloatLevel:
-    Opc = NVPTX::TEX_1D_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DS32FloatGrad:
-    Opc = NVPTX::TEX_1D_S32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex1DU32S32:
-    Opc = NVPTX::TEX_1D_U32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DU32Float:
-    Opc = NVPTX::TEX_1D_U32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DU32FloatLevel:
-    Opc = NVPTX::TEX_1D_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DU32FloatGrad:
-    Opc = NVPTX::TEX_1D_U32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex1DArrayFloatS32:
-    Opc = NVPTX::TEX_1D_ARRAY_F32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayFloatFloat:
-    Opc = NVPTX::TEX_1D_ARRAY_F32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayFloatFloatLevel:
-    Opc = NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DArrayFloatFloatGrad:
-    Opc = NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex1DArrayS32S32:
-    Opc = NVPTX::TEX_1D_ARRAY_S32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayS32Float:
-    Opc = NVPTX::TEX_1D_ARRAY_S32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayS32FloatLevel:
-    Opc = NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DArrayS32FloatGrad:
-    Opc = NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex1DArrayU32S32:
-    Opc = NVPTX::TEX_1D_ARRAY_U32_S32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayU32Float:
-    Opc = NVPTX::TEX_1D_ARRAY_U32_F32_RR;
-    break;
-  case NVPTXISD::Tex1DArrayU32FloatLevel:
-    Opc = NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex1DArrayU32FloatGrad:
-    Opc = NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DFloatS32:
-    Opc = NVPTX::TEX_2D_F32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DFloatFloat:
-    Opc = NVPTX::TEX_2D_F32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DFloatFloatLevel:
-    Opc = NVPTX::TEX_2D_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DFloatFloatGrad:
-    Opc = NVPTX::TEX_2D_F32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DS32S32:
-    Opc = NVPTX::TEX_2D_S32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DS32Float:
-    Opc = NVPTX::TEX_2D_S32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DS32FloatLevel:
-    Opc = NVPTX::TEX_2D_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DS32FloatGrad:
-    Opc = NVPTX::TEX_2D_S32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DU32S32:
-    Opc = NVPTX::TEX_2D_U32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DU32Float:
-    Opc = NVPTX::TEX_2D_U32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DU32FloatLevel:
-    Opc = NVPTX::TEX_2D_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DU32FloatGrad:
-    Opc = NVPTX::TEX_2D_U32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DArrayFloatS32:
-    Opc = NVPTX::TEX_2D_ARRAY_F32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayFloatFloat:
-    Opc = NVPTX::TEX_2D_ARRAY_F32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayFloatFloatLevel:
-    Opc = NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DArrayFloatFloatGrad:
-    Opc = NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DArrayS32S32:
-    Opc = NVPTX::TEX_2D_ARRAY_S32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayS32Float:
-    Opc = NVPTX::TEX_2D_ARRAY_S32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayS32FloatLevel:
-    Opc = NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DArrayS32FloatGrad:
-    Opc = NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex2DArrayU32S32:
-    Opc = NVPTX::TEX_2D_ARRAY_U32_S32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayU32Float:
-    Opc = NVPTX::TEX_2D_ARRAY_U32_F32_RR;
-    break;
-  case NVPTXISD::Tex2DArrayU32FloatLevel:
-    Opc = NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex2DArrayU32FloatGrad:
-    Opc = NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex3DFloatS32:
-    Opc = NVPTX::TEX_3D_F32_S32_RR;
-    break;
-  case NVPTXISD::Tex3DFloatFloat:
-    Opc = NVPTX::TEX_3D_F32_F32_RR;
-    break;
-  case NVPTXISD::Tex3DFloatFloatLevel:
-    Opc = NVPTX::TEX_3D_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex3DFloatFloatGrad:
-    Opc = NVPTX::TEX_3D_F32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex3DS32S32:
-    Opc = NVPTX::TEX_3D_S32_S32_RR;
-    break;
-  case NVPTXISD::Tex3DS32Float:
-    Opc = NVPTX::TEX_3D_S32_F32_RR;
-    break;
-  case NVPTXISD::Tex3DS32FloatLevel:
-    Opc = NVPTX::TEX_3D_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex3DS32FloatGrad:
-    Opc = NVPTX::TEX_3D_S32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::Tex3DU32S32:
-    Opc = NVPTX::TEX_3D_U32_S32_RR;
-    break;
-  case NVPTXISD::Tex3DU32Float:
-    Opc = NVPTX::TEX_3D_U32_F32_RR;
-    break;
-  case NVPTXISD::Tex3DU32FloatLevel:
-    Opc = NVPTX::TEX_3D_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::Tex3DU32FloatGrad:
-    Opc = NVPTX::TEX_3D_U32_F32_GRAD_RR;
-    break;
-  case NVPTXISD::TexCubeFloatFloat:
-    Opc = NVPTX::TEX_CUBE_F32_F32_RR;
-    break;
-  case NVPTXISD::TexCubeFloatFloatLevel:
-    Opc = NVPTX::TEX_CUBE_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::TexCubeS32Float:
-    Opc = NVPTX::TEX_CUBE_S32_F32_RR;
-    break;
-  case NVPTXISD::TexCubeS32FloatLevel:
-    Opc = NVPTX::TEX_CUBE_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::TexCubeU32Float:
-    Opc = NVPTX::TEX_CUBE_U32_F32_RR;
-    break;
-  case NVPTXISD::TexCubeU32FloatLevel:
-    Opc = NVPTX::TEX_CUBE_U32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::TexCubeArrayFloatFloat:
-    Opc = NVPTX::TEX_CUBE_ARRAY_F32_F32_RR;
-    break;
-  case NVPTXISD::TexCubeArrayFloatFloatLevel:
-    Opc = NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::TexCubeArrayS32Float:
-    Opc = NVPTX::TEX_CUBE_ARRAY_S32_F32_RR;
-    break;
-  case NVPTXISD::TexCubeArrayS32FloatLevel:
-    Opc = NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RR;
-    break;
-  case NVPTXISD::TexCubeArrayU32Float:
- ...
[truncated]

s-barannikov
s-barannikov commented Dec 14, 2024
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@s-barannikov s-barannikov requested a review from bogner December 14, 2024 19:38
@s-barannikov s-barannikov force-pushed the sdag/nvptx-intrinsics branch 2 times, most recently from bdc66dd to 50572df Compare December 14, 2024 22:25
AlexMaclean
AlexMaclean approved these changes Dec 16, 2024
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Nice! Thanks for this major cleanup

@AlexMaclean AlexMaclean requested a review from Artem-B December 16, 2024 16:19
@s-barannikov s-barannikov merged commit 696d120 into llvm:main Dec 16, 2024
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@s-barannikov s-barannikov deleted the sdag/nvptx-intrinsics branch December 16, 2024 19:06
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@AlexMaclean AlexMaclean AlexMaclean approved these changes

@bogner bogner Awaiting requested review from bogner

@asavonic asavonic Awaiting requested review from asavonic

@Artem-B Artem-B Awaiting requested review from Artem-B

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@s-barannikov @llvmbot @AlexMaclean