From cc3152ef3cb4443111a43116a5e152eefb8bb191 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Tue, 7 Jan 2025 10:36:21 -0800 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?= =?UTF-8?q?l=20version?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Created using spr 1.3.6-beta.1 --- .../Inputs/basic-cplusplus.cpp | 7 + .../Inputs/basic-cplusplus.cpp.expected | 356 +++++++++++++++--- .../Inputs/c-symbol-mangling.c | 49 +++ .../Inputs/c-symbol-mangling.c.expected | 246 ++++++++++++ .../c-symbol-mangling.test | 8 + 5 files changed, 623 insertions(+), 43 deletions(-) create mode 100644 clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c create mode 100644 clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected create mode 100644 clang/test/utils/update_cc_test_checks/c-symbol-mangling.test diff --git a/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp b/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp index 98be350b39377..e332528e24e20 100644 --- a/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp +++ b/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp @@ -1,5 +1,9 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --version 5 // Basic C++ test for update_cc_test_checks // RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple=x86_64-apple-macho -emit-llvm -o - %s | FileCheck %s --check-prefix=MACHO +// RUN: %clang_cc1 -triple=x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=MSVC +// RUN: %clang_cc1 -triple=x86_64-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=MINGW class Foo { int x; @@ -13,6 +17,8 @@ class Foo { inline int function_defined_out_of_line(int arg) const; }; +[[clang::noinline]] static int static_noinline_fn(int arg) { return arg; } + Foo::Foo(int x) : x(x) {} Foo::~Foo() {} int Foo::function_defined_out_of_line(int arg) const { return x - arg; } @@ -22,4 +28,5 @@ int main() { Foo f(1); f.function_defined_inline(2); f.function_defined_out_of_line(3); + return static_noinline_fn(0); } diff --git a/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected b/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected index c42dc07fa3597..96370b4bec2d9 100644 --- a/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected +++ b/clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected @@ -1,6 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --version 5 // Basic C++ test for update_cc_test_checks // RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple=x86_64-apple-macho -emit-llvm -o - %s | FileCheck %s --check-prefix=MACHO +// RUN: %clang_cc1 -triple=x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=MSVC +// RUN: %clang_cc1 -triple=x86_64-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=MINGW class Foo { int x; @@ -8,52 +11,109 @@ class Foo { public: explicit Foo(int x); ~Foo(); -// CHECK-LABEL: @_ZNK3Foo23function_defined_inlineEi( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 -// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 -// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8 -// CHECK-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 -// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 -// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4 -// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: ret i32 [[ADD]] -// inline int function_defined_inline(int arg) const { return arg + x; } inline int function_defined_out_of_line(int arg) const; }; -// CHECK-LABEL: @_ZN3FooC1Ei( -// CHECK-NEXT: entry: +[[clang::noinline]] static int static_noinline_fn(int arg) { return arg; } + +Foo::Foo(int x) : x(x) {} +Foo::~Foo() {} +int Foo::function_defined_out_of_line(int arg) const { return x - arg; } + +// Call the inline methods to ensure the LLVM IR is generated: +int main() { + Foo f(1); + f.function_defined_inline(2); + f.function_defined_out_of_line(3); + return static_noinline_fn(0); +} +// CHECK-LABEL: define dso_local void @_ZN3FooC2Ei( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0:[0-9]+]] align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 +// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: [[X2:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr [[X2]], align 4 +// CHECK-NEXT: ret void +// +// +// CHECK-LABEL: define dso_local void @_ZN3FooC1Ei( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 -// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8 -// CHECK-NEXT: store i32 [[X:%.*]], ptr [[X_ADDR]], align 4 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 // CHECK-NEXT: call void @_ZN3FooC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) // CHECK-NEXT: ret void // -Foo::Foo(int x) : x(x) {} -// CHECK-LABEL: @_ZN3FooD1Ev( -// CHECK-NEXT: entry: +// +// CHECK-LABEL: define dso_local void @_ZN3FooD2Ev( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 -// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: ret void +// +// +// CHECK-LABEL: define dso_local void @_ZN3FooD1Ev( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK-NEXT: call void @_ZN3FooD2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2:[0-9]+]] // CHECK-NEXT: ret void // -Foo::~Foo() {} -// CHECK-LABEL: @_ZNK3Foo28function_defined_out_of_lineEi( -// CHECK-NEXT: entry: +// +// CHECK-LABEL: define dso_local noundef i32 @main( +// CHECK-SAME: ) #[[ATTR1:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[F:%.*]] = alloca [[CLASS_FOO:%.*]], align 4 +// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4 +// CHECK-NEXT: call void @_ZN3FooC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 1) +// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_ZNK3Foo23function_defined_inlineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 2) +// CHECK-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 3) +// CHECK-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZL18static_noinline_fni(i32 noundef 0) +// CHECK-NEXT: store i32 [[CALL2]], ptr [[RETVAL]], align 4 +// CHECK-NEXT: call void @_ZN3FooD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[F]]) #[[ATTR2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4 +// CHECK-NEXT: ret i32 [[TMP0]] +// +// +// CHECK-LABEL: define linkonce_odr noundef i32 @_ZNK3Foo23function_defined_inlineEi( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 -// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8 -// CHECK-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4 +// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] +// CHECK-NEXT: ret i32 [[ADD]] +// +// +// CHECK-LABEL: define linkonce_odr noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi( +// CHECK-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat align 2 { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4 @@ -61,20 +121,230 @@ Foo::~Foo() {} // CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]] // CHECK-NEXT: ret i32 [[SUB]] // -int Foo::function_defined_out_of_line(int arg) const { return x - arg; } - -// Call the inline methods to ensure the LLVM IR is generated: -// CHECK-LABEL: @main( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[F:%.*]] = alloca [[CLASS_FOO:%.*]], align 4 -// CHECK-NEXT: call void @_ZN3FooC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 1) -// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_ZNK3Foo23function_defined_inlineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 2) -// CHECK-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 3) -// CHECK-NEXT: call void @_ZN3FooD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[F]]) #[[ATTR2]] -// CHECK-NEXT: ret i32 0 // -int main() { - Foo f(1); - f.function_defined_inline(2); - f.function_defined_out_of_line(3); -} +// CHECK-LABEL: define internal noundef i32 @_ZL18static_noinline_fni( +// CHECK-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// CHECK-NEXT: ret i32 [[TMP0]] +// +// +// MACHO-LABEL: define void @_ZN3FooC2Ei( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0:[0-9]+]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[X2:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 +// MACHO-NEXT: store i32 [[TMP0]], ptr [[X2]], align 4 +// MACHO-NEXT: ret void +// +// +// MACHO-LABEL: define void @_ZN3FooC1Ei( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 +// MACHO-NEXT: call void @_ZN3FooC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) +// MACHO-NEXT: ret void +// +// +// MACHO-LABEL: define void @_ZN3FooD2Ev( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: ret void +// +// +// MACHO-LABEL: define void @_ZN3FooD1Ev( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: call void @_ZN3FooD2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2:[0-9]+]] +// MACHO-NEXT: ret void +// +// +// MACHO-LABEL: define noundef i32 @main( +// MACHO-SAME: ) #[[ATTR1:[0-9]+]] { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 +// MACHO-NEXT: [[F:%.*]] = alloca [[CLASS_FOO:%.*]], align 4 +// MACHO-NEXT: store i32 0, ptr [[RETVAL]], align 4 +// MACHO-NEXT: call void @_ZN3FooC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 1) +// MACHO-NEXT: [[CALL:%.*]] = call noundef i32 @_ZNK3Foo23function_defined_inlineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 2) +// MACHO-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 3) +// MACHO-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZL18static_noinline_fni(i32 noundef 0) +// MACHO-NEXT: store i32 [[CALL2]], ptr [[RETVAL]], align 4 +// MACHO-NEXT: call void @_ZN3FooD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[F]]) #[[ATTR2]] +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// +// MACHO-LABEL: define linkonce_odr noundef i32 @_ZNK3Foo23function_defined_inlineEi( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MACHO-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4 +// MACHO-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] +// MACHO-NEXT: ret i32 [[ADD]] +// +// +// MACHO-LABEL: define linkonce_odr noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi( +// MACHO-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] align 2 { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MACHO-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4 +// MACHO-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]] +// MACHO-NEXT: ret i32 [[SUB]] +// +// +// MACHO-LABEL: define internal noundef i32 @_ZL18static_noinline_fni( +// MACHO-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] { +// MACHO-NEXT: [[ENTRY:.*:]] +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// +// MSVC-LABEL: define dso_local noundef i32 @main( +// MSVC-SAME: ) #[[ATTR1:[0-9]+]] { +// MSVC-NEXT: [[ENTRY:.*:]] +// MSVC-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 +// MSVC-NEXT: [[F:%.*]] = alloca [[CLASS_FOO:%.*]], align 4 +// MSVC-NEXT: store i32 0, ptr [[RETVAL]], align 4 +// MSVC-NEXT: [[CALL:%.*]] = call noundef ptr @"??0Foo@@QEAA@H@Z"(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 1) +// MSVC-NEXT: [[CALL1:%.*]] = call noundef i32 @"?function_defined_inline@Foo@@QEBAHH@Z"(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 2) +// MSVC-NEXT: [[CALL2:%.*]] = call noundef i32 @"?function_defined_out_of_line@Foo@@QEBAHH@Z"(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 3) +// MSVC-NEXT: [[CALL3:%.*]] = call noundef i32 @"?static_noinline_fn@@YAHH@Z"(i32 noundef 0) +// MSVC-NEXT: store i32 [[CALL3]], ptr [[RETVAL]], align 4 +// MSVC-NEXT: call void @"??1Foo@@QEAA@XZ"(ptr noundef nonnull align 4 dereferenceable(4) [[F]]) #[[ATTR2:[0-9]+]] +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// +// MINGW-LABEL: define dso_local void @_ZN3FooC2Ei( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0:[0-9]+]] align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[X2:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 +// MINGW-NEXT: store i32 [[TMP0]], ptr [[X2]], align 4 +// MINGW-NEXT: ret void +// +// +// MINGW-LABEL: define dso_local void @_ZN3FooC1Ei( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[X:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4 +// MINGW-NEXT: call void @_ZN3FooC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) +// MINGW-NEXT: ret void +// +// +// MINGW-LABEL: define dso_local void @_ZN3FooD2Ev( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: ret void +// +// +// MINGW-LABEL: define dso_local void @_ZN3FooD1Ev( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: call void @_ZN3FooD2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2:[0-9]+]] +// MINGW-NEXT: ret void +// +// +// MINGW-LABEL: define dso_local noundef i32 @main( +// MINGW-SAME: ) #[[ATTR1:[0-9]+]] { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 +// MINGW-NEXT: [[F:%.*]] = alloca [[CLASS_FOO:%.*]], align 4 +// MINGW-NEXT: store i32 0, ptr [[RETVAL]], align 4 +// MINGW-NEXT: call void @_ZN3FooC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 1) +// MINGW-NEXT: [[CALL:%.*]] = call noundef i32 @_ZNK3Foo23function_defined_inlineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 2) +// MINGW-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi(ptr noundef nonnull align 4 dereferenceable(4) [[F]], i32 noundef 3) +// MINGW-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZL18static_noinline_fni(i32 noundef 0) +// MINGW-NEXT: store i32 [[CALL2]], ptr [[RETVAL]], align 4 +// MINGW-NEXT: call void @_ZN3FooD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[F]]) #[[ATTR2]] +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +// +// MINGW-LABEL: define linkonce_odr dso_local noundef i32 @_ZNK3Foo23function_defined_inlineEi( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MINGW-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4 +// MINGW-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] +// MINGW-NEXT: ret i32 [[ADD]] +// +// +// MINGW-LABEL: define linkonce_odr dso_local noundef i32 @_ZNK3Foo28function_defined_out_of_lineEi( +// MINGW-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat align 2 { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 +// MINGW-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4 +// MINGW-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]] +// MINGW-NEXT: ret i32 [[SUB]] +// +// +// MINGW-LABEL: define internal noundef i32 @_ZL18static_noinline_fni( +// MINGW-SAME: i32 noundef [[ARG:%.*]]) #[[ATTR0]] { +// MINGW-NEXT: [[ENTRY:.*:]] +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// diff --git a/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c b/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c new file mode 100644 index 0000000000000..018f992640065 --- /dev/null +++ b/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c @@ -0,0 +1,49 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +/// Check that we generate checks for functions even though the mangledName +/// property in the AST dump JSON does not match the LLVM IR name. +// RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ELF +// RUN: %clang_cc1 -triple=x86_64-apple-macho -emit-llvm -o - %s | FileCheck %s --check-prefix=MACHO +// RUN: %clang_cc1 -triple=x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=MSVC +// RUN: %clang_cc1 -triple=x86_64-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=MINGW +// RUN: %clang_cc1 -triple=i686-unknown-win32 -emit-llvm -o - %s | FileCheck %s --check-prefix=WIN32 +// RUN: %clang_cc1 -triple thumbv7s-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=THUMB-DARWIN + +// UTC_ARGS: --disable +// ELF: target datalayout = "e-m:e- +// MACHO: target datalayout = "e-m:o- +// MSVC: target datalayout = "e-m:w- +// MINGW: target datalayout = "e-m:w- +// WIN32: target datalayout = "e-m:x- +// THUMB-DARWIN: target datalayout = "e-m:o- +// UTC_ARGS: --enable + +#ifdef __arm__ +/// FIXME: UTC does not find this function, but can find all others. +typedef __attribute__((neon_vector_type(8))) __INT8_TYPE__ int8x8_t; +int8x8_t test_vaba_s8(int8x8_t a, int8x8_t b, int8x8_t c) { + return a + b + c; +} +#endif + +/// Check global variable mangling +[[gnu::used]] static int i1 = 1; +int i2 = 2; + +[[clang::noinline,gnu::used]] static int static_noinline_fn(int arg) { return arg; } + +[[gnu::visibility("hidden")]] int hidden_visibility(int arg) { return arg; } + +#ifdef __ELF__ +[[gnu::visibility("protected")]] int protected_visibility(int arg) { return arg; } +#endif + +[[gnu::visibility("default")]] int default_visibility(int arg) { return arg; } + +int no_visibility(int arg) { return arg; } + + +/// FIXME: the i386 @fastcall@12 is not being checked here +#ifdef _WIN32 +int __fastcall fastcall(int arg, long arg2, long arg3) { return arg; } +#endif + diff --git a/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected b/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected new file mode 100644 index 0000000000000..5d514f9d64c02 --- /dev/null +++ b/clang/test/utils/update_cc_test_checks/Inputs/c-symbol-mangling.c.expected @@ -0,0 +1,246 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +/// Check that we generate checks for functions even though the mangledName +/// property in the AST dump JSON does not match the LLVM IR name. +// RUN: %clang_cc1 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ELF +// RUN: %clang_cc1 -triple=x86_64-apple-macho -emit-llvm -o - %s | FileCheck %s --check-prefix=MACHO +// RUN: %clang_cc1 -triple=x86_64-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=MSVC +// RUN: %clang_cc1 -triple=x86_64-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=MINGW +// RUN: %clang_cc1 -triple=i686-unknown-win32 -emit-llvm -o - %s | FileCheck %s --check-prefix=WIN32 +// RUN: %clang_cc1 -triple thumbv7s-apple-darwin -target-abi apcs-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=THUMB-DARWIN + +// UTC_ARGS: --disable +// ELF: target datalayout = "e-m:e- +// MACHO: target datalayout = "e-m:o- +// MSVC: target datalayout = "e-m:w- +// MINGW: target datalayout = "e-m:w- +// WIN32: target datalayout = "e-m:x- +// THUMB-DARWIN: target datalayout = "e-m:o- +// UTC_ARGS: --enable + +#ifdef __arm__ +/// FIXME: UTC does not find this function, but can find all others. +typedef __attribute__((neon_vector_type(8))) __INT8_TYPE__ int8x8_t; +int8x8_t test_vaba_s8(int8x8_t a, int8x8_t b, int8x8_t c) { + return a + b + c; +} +#endif + +/// Check global variable mangling +[[gnu::used]] static int i1 = 1; +int i2 = 2; + +// ELF-LABEL: @static_noinline_fn( +// ELF-NEXT: entry: +// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: ret i32 [[TMP0]] +// +// MACHO-LABEL: @static_noinline_fn( +// MACHO-NEXT: entry: +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// MSVC-LABEL: @static_noinline_fn( +// MSVC-NEXT: entry: +// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// MINGW-LABEL: @static_noinline_fn( +// MINGW-NEXT: entry: +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +// WIN32-LABEL: @static_noinline_fn( +// WIN32-NEXT: entry: +// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: ret i32 [[TMP0]] +// +// THUMB-DARWIN-LABEL: @static_noinline_fn( +// THUMB-DARWIN-NEXT: entry: +// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: ret i32 [[TMP0]] +// +[[clang::noinline,gnu::used]] static int static_noinline_fn(int arg) { return arg; } + +// ELF-LABEL: @hidden_visibility( +// ELF-NEXT: entry: +// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: ret i32 [[TMP0]] +// +// MACHO-LABEL: @hidden_visibility( +// MACHO-NEXT: entry: +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// MSVC-LABEL: @hidden_visibility( +// MSVC-NEXT: entry: +// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// MINGW-LABEL: @hidden_visibility( +// MINGW-NEXT: entry: +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +// WIN32-LABEL: @hidden_visibility( +// WIN32-NEXT: entry: +// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: ret i32 [[TMP0]] +// +// THUMB-DARWIN-LABEL: @hidden_visibility( +// THUMB-DARWIN-NEXT: entry: +// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: ret i32 [[TMP0]] +// +[[gnu::visibility("hidden")]] int hidden_visibility(int arg) { return arg; } + +#ifdef __ELF__ +// ELF-LABEL: @protected_visibility( +// ELF-NEXT: entry: +// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: ret i32 [[TMP0]] +// +[[gnu::visibility("protected")]] int protected_visibility(int arg) { return arg; } +#endif + +// ELF-LABEL: @default_visibility( +// ELF-NEXT: entry: +// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: ret i32 [[TMP0]] +// +// MACHO-LABEL: @default_visibility( +// MACHO-NEXT: entry: +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// MSVC-LABEL: @default_visibility( +// MSVC-NEXT: entry: +// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// MINGW-LABEL: @default_visibility( +// MINGW-NEXT: entry: +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +// WIN32-LABEL: @default_visibility( +// WIN32-NEXT: entry: +// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: ret i32 [[TMP0]] +// +// THUMB-DARWIN-LABEL: @default_visibility( +// THUMB-DARWIN-NEXT: entry: +// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: ret i32 [[TMP0]] +// +[[gnu::visibility("default")]] int default_visibility(int arg) { return arg; } + +// ELF-LABEL: @no_visibility( +// ELF-NEXT: entry: +// ELF-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// ELF-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// ELF-NEXT: ret i32 [[TMP0]] +// +// MACHO-LABEL: @no_visibility( +// MACHO-NEXT: entry: +// MACHO-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MACHO-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MACHO-NEXT: ret i32 [[TMP0]] +// +// MSVC-LABEL: @no_visibility( +// MSVC-NEXT: entry: +// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// MINGW-LABEL: @no_visibility( +// MINGW-NEXT: entry: +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +// WIN32-LABEL: @no_visibility( +// WIN32-NEXT: entry: +// WIN32-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// WIN32-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// WIN32-NEXT: ret i32 [[TMP0]] +// +// THUMB-DARWIN-LABEL: @no_visibility( +// THUMB-DARWIN-NEXT: entry: +// THUMB-DARWIN-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// THUMB-DARWIN-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// THUMB-DARWIN-NEXT: ret i32 [[TMP0]] +// +int no_visibility(int arg) { return arg; } + + +/// FIXME: the i386 @fastcall@12 is not being checked here +#ifdef _WIN32 +// MSVC-LABEL: @fastcall( +// MSVC-NEXT: entry: +// MSVC-NEXT: [[ARG3_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: [[ARG2_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MSVC-NEXT: store i32 [[ARG3:%.*]], ptr [[ARG3_ADDR]], align 4 +// MSVC-NEXT: store i32 [[ARG2:%.*]], ptr [[ARG2_ADDR]], align 4 +// MSVC-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MSVC-NEXT: ret i32 [[TMP0]] +// +// MINGW-LABEL: @fastcall( +// MINGW-NEXT: entry: +// MINGW-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: [[ARG2_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: [[ARG3_ADDR:%.*]] = alloca i32, align 4 +// MINGW-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: store i32 [[ARG2:%.*]], ptr [[ARG2_ADDR]], align 4 +// MINGW-NEXT: store i32 [[ARG3:%.*]], ptr [[ARG3_ADDR]], align 4 +// MINGW-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 +// MINGW-NEXT: ret i32 [[TMP0]] +// +int __fastcall fastcall(int arg, long arg2, long arg3) { return arg; } +#endif + diff --git a/clang/test/utils/update_cc_test_checks/c-symbol-mangling.test b/clang/test/utils/update_cc_test_checks/c-symbol-mangling.test new file mode 100644 index 0000000000000..35cff933932fd --- /dev/null +++ b/clang/test/utils/update_cc_test_checks/c-symbol-mangling.test @@ -0,0 +1,8 @@ +## Test that we handle mangled C symbol names correctly in the update script + +# RUN: cp %S/Inputs/c-symbol-mangling.c %t-generated.c && %update_cc_test_checks %t-generated.c +# RUN: diff -u %S/Inputs/c-symbol-mangling.c.expected %t-generated.c + +## Check that re-running update_cc_test_checks doesn't change the output +# RUN: %update_cc_test_checks %t-generated.c +# RUN: diff -u %S/Inputs/c-symbol-mangling.c.expected %t-generated.c