diff --git a/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp b/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp index ad079f45c8829..5fd5c226eef89 100644 --- a/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp +++ b/llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp @@ -331,7 +331,6 @@ static void translateBranchMetadata(Module &M) { BBTerminatorInst->setMetadata("dx.controlflow.hints", MDNode); BBTerminatorInst->setMetadata("hlsl.controlflow.hint", nullptr); } - F.clearMetadata(); } } diff --git a/llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll b/llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll index fe66e481359bb..0ae3e005489f5 100644 --- a/llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll +++ b/llvm/test/CodeGen/DirectX/HLSLControlFlowHint.ll @@ -4,7 +4,7 @@ ; CHECK: define i32 @test_branch(i32 %X) -; CHECK-NO: hlsl.controlflow.hint +; CHECK-NOT: hlsl.controlflow.hint ; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_BRANCH:![0-9]+]] define i32 @test_branch(i32 %X) { entry: @@ -32,9 +32,8 @@ if.end: ; preds = %if.else, %if.then ret i32 %3 } - ; CHECK: define i32 @test_flatten(i32 %X) -; CHECK-NO: hlsl.controlflow.hint +; CHECK-NOT: hlsl.controlflow.hint ; CHECK: br i1 %cmp, label %if.then, label %if.else, !dx.controlflow.hints [[HINT_FLATTEN:![0-9]+]] define i32 @test_flatten(i32 %X) { entry: @@ -64,8 +63,8 @@ if.end: ; preds = %if.else, %if.then ; CHECK: define i32 @test_no_attr(i32 %X) -; CHECK-NO: hlsl.controlflow.hint -; CHECK-NO: !dx.controlflow.hints +; CHECK-NOT: hlsl.controlflow.hint +; CHECK-NOT: !dx.controlflow.hints define i32 @test_no_attr(i32 %X) { entry: %X.addr = alloca i32, align 4 @@ -91,7 +90,7 @@ if.end: ; preds = %if.else, %if.then %3 = load i32, ptr %resp, align 4 ret i32 %3 } -; CHECK-NO: hlsl.controlflow.hint +; CHECK-NOT: hlsl.controlflow.hint ; CHECK: [[HINT_BRANCH]] = !{!"dx.controlflow.hints", i32 1} ; CHECK: [[HINT_FLATTEN]] = !{!"dx.controlflow.hints", i32 2} !0 = !{!"hlsl.controlflow.hint", i32 1}