From 6835bce2d99445693cdcc721fe6f1794be09e9e3 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Wed, 8 Jan 2025 20:13:37 +0800 Subject: [PATCH] [CodeGenPrepare] Regenerate test `X86/codegen-prepare-addrmode-sext.ll` --- .../X86/codegen-prepare-addrmode-sext.ll | 457 +++++++++++------- 1 file changed, 285 insertions(+), 172 deletions(-) diff --git a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll index c611e89f27865..f3070cd55903b 100644 --- a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll +++ b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -S -passes='require,function(codegenprepare)' %s -o - | FileCheck %s ; This file tests the different cases what are involved when codegen prepare ; tries to get sign/zero extension out of the way of addressing mode. @@ -9,14 +10,17 @@ target triple = "x86_64-apple-macosx" ; Check that we correctly promote both operands of the promotable add. -; CHECK-LABEL: @twoArgsPromotion -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg1 to i64 -; CHECK: [[ARG2SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg2 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], [[ARG2SEXT]] -; CHECK: inttoptr i64 [[PROMOTED]] to ptr -; CHECK: ret define i8 @twoArgsPromotion(i32 %arg1, i32 %arg2) { - %add = add nsw i32 %arg1, %arg2 +; CHECK-LABEL: define i8 @twoArgsPromotion( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i32 [[ARG1]] to i64 +; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i32 [[ARG2]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], [[PROMOTED2]] +; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ADD]] to ptr +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nsw i32 %arg1, %arg2 %sextadd = sext i32 %add to i64 %base = inttoptr i64 %sextadd to ptr %res = load i8, ptr %base @@ -28,11 +32,16 @@ define i8 @twoArgsPromotion(i32 %arg1, i32 %arg2) { ; Otherwise, we will increase the number of instruction executed. ; (This is a heuristic of course, because the new sext could have been ; merged with something else.) -; CHECK-LABEL: @twoArgsNoPromotion -; CHECK: add nsw i32 %arg1, %arg2 -; CHECK: ret define i8 @twoArgsNoPromotion(i32 %arg1, i32 %arg2, ptr %base) { - %add = add nsw i32 %arg1, %arg2 +; CHECK-LABEL: define i8 @twoArgsNoPromotion( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[ARG1]], [[ARG2]] +; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[ADD]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nsw i32 %arg1, %arg2 %sextadd = sext i32 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -41,11 +50,16 @@ define i8 @twoArgsNoPromotion(i32 %arg1, i32 %arg2, ptr %base) { ; Check that we do not promote when the related instruction does not have ; the nsw flag. -; CHECK-LABEL: @noPromotion -; CHECK-NOT: add i64 -; CHECK: ret define i8 @noPromotion(i32 %arg1, i32 %arg2, ptr %base) { - %add = add i32 %arg1, %arg2 +; CHECK-LABEL: define i8 @noPromotion( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ARG1]], [[ARG2]] +; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[ADD]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add i32 %arg1, %arg2 %sextadd = sext i32 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -53,13 +67,16 @@ define i8 @noPromotion(i32 %arg1, i32 %arg2, ptr %base) { } ; Check that we correctly promote constant arguments. -; CHECK-LABEL: @oneArgPromotion -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotion(i32 %arg1, ptr %base) { - %add = add nsw i32 %arg1, 1 +; CHECK-LABEL: define i8 @oneArgPromotion( +; CHECK-SAME: i32 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i32 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nsw i32 %arg1, 1 %sextadd = sext i32 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -67,14 +84,17 @@ define i8 @oneArgPromotion(i32 %arg1, ptr %base) { } ; Check that we are able to merge a sign extension with a zero extension. -; CHECK-LABEL: @oneArgPromotionZExt -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1ZEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionZExt(i8 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionZExt( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %zext = zext i8 %arg1 to i32 - %add = add nsw i32 %zext, 1 + %add = add nsw i32 %zext, 1 %sextadd = sext i32 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -88,11 +108,14 @@ define i8 @oneArgPromotionZExt(i8 %arg1, ptr %base) { ; more thing in the addressing mode. Therefore the modification is ; rolled back. ; Still, this test case exercises the desired code path. -; CHECK-LABEL: @oneArgPromotionCstZExt -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 0, 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionCstZExt(ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionCstZExt( +; CHECK-SAME: ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 0, 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %cst = zext i16 undef to i32 %add = add nsw i32 %cst, 1 %sextadd = sext i32 %add to i64 @@ -103,15 +126,18 @@ define i8 @oneArgPromotionCstZExt(ptr %base) { ; Check that we do not promote truncate when we cannot determine the ; bits that are dropped. -; CHECK-LABEL: @oneArgPromotionBlockTrunc1 -; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 %arg1 to i8 -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionBlockTrunc1(i32 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionBlockTrunc1( +; CHECK-SAME: i32 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARG1]] to i8 +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[TRUNC]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %trunc = trunc i32 %arg1 to i8 - %add = add nsw i8 %trunc, 1 + %add = add nsw i8 %trunc, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -120,17 +146,20 @@ define i8 @oneArgPromotionBlockTrunc1(i32 %arg1, ptr %base) { ; Check that we do not promote truncate when we cannot determine all the ; bits that are dropped. -; CHECK-LABEL: @oneArgPromotionBlockTrunc2 -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i16 %arg1 to i32 -; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 [[ARG1SEXT]] to i8 -; CHECK: [[ARG1SEXT64:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT64]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionBlockTrunc2(i16 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionBlockTrunc2( +; CHECK-SAME: i16 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i16 [[ARG1]] to i32 +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8 +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[TRUNC]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = sext i16 %arg1 to i32 %trunc = trunc i32 %sextarg1 to i8 - %add = add nsw i8 %trunc, 1 + %add = add nsw i8 %trunc, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -139,15 +168,18 @@ define i8 @oneArgPromotionBlockTrunc2(i16 %arg1, ptr %base) { ; Check that we are able to promote truncate when we know all the bits ; that are dropped. -; CHECK-LABEL: @oneArgPromotionPassTruncKeepSExt -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionPassTruncKeepSExt(i1 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionPassTruncKeepSExt( +; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i1 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = sext i1 %arg1 to i32 %trunc = trunc i32 %sextarg1 to i8 - %add = add nsw i8 %trunc, 1 + %add = add nsw i8 %trunc, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -156,17 +188,19 @@ define i8 @oneArgPromotionPassTruncKeepSExt(i1 %arg1, ptr %base) { ; On X86 truncate are free. Check that we are able to promote the add ; to be used as addressing mode and that we insert a truncate for the other -; use. -; CHECK-LABEL: @oneArgPromotionTruncInsert -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i64 [[PROMOTED]] to i8 -; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8, ptr [[GEP]] -; CHECK: add i8 [[LOAD]], [[TRUNC]] -; CHECK: ret +; use. define i8 @oneArgPromotionTruncInsert(i8 %arg1, ptr %base) { - %add = add nsw i8 %arg1, 1 +; CHECK-LABEL: define i8 @oneArgPromotionTruncInsert( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]] +; CHECK-NEXT: ret i8 [[FINALRES]] +; + %add = add nsw i8 %arg1, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -175,15 +209,20 @@ define i8 @oneArgPromotionTruncInsert(i8 %arg1, ptr %base) { } ; Cannot sext from a larger type than the promoted type. -; CHECK-LABEL: @oneArgPromotionLargerType -; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i128 %arg1 to i8 -; CHECK: [[ARG1SEXT64:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT64]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionLargerType(i128 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionLargerType( +; CHECK-SAME: i128 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i128 [[ARG1]] to i8 +; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[TRUNC]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]] +; CHECK-NEXT: ret i8 [[FINALRES]] +; %trunc = trunc i128 %arg1 to i8 - %add = add nsw i8 %trunc, 1 + %add = add nsw i8 %trunc, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -194,18 +233,20 @@ define i8 @oneArgPromotionLargerType(i128 %arg1, ptr %base) { ; Use same inserted trunc ; On X86 truncate are free. Check that we are able to promote the add ; to be used as addressing mode and that we insert a truncate for -; *all* the other uses. -; CHECK-LABEL: @oneArgPromotionTruncInsertSeveralUse -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i64 [[PROMOTED]] to i8 -; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8, ptr [[GEP]] -; CHECK: [[ADDRES:%[a-zA-Z_0-9-]+]] = add i8 [[LOAD]], [[TRUNC]] -; CHECK: add i8 [[ADDRES]], [[TRUNC]] -; CHECK: ret +; *all* the other uses. define i8 @oneArgPromotionTruncInsertSeveralUse(i8 %arg1, ptr %base) { - %add = add nsw i8 %arg1, 1 +; CHECK-LABEL: define i8 @oneArgPromotionTruncInsertSeveralUse( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[PROMOTED:%.*]] = trunc i64 [[ADD]] to i8 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: [[ALMOSTFINALRES:%.*]] = add i8 [[RES]], [[PROMOTED]] +; CHECK-NEXT: [[FINALRES:%.*]] = add i8 [[ALMOSTFINALRES]], [[PROMOTED]] +; CHECK-NEXT: ret i8 [[FINALRES]] +; + %add = add nsw i8 %arg1, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -216,16 +257,18 @@ define i8 @oneArgPromotionTruncInsertSeveralUse(i8 %arg1, ptr %base) { ; Check that the promoted instruction is used for all uses of the original ; sign extension. -; CHECK-LABEL: @oneArgPromotionSExtSeveralUse -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1 -; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8, ptr [[GEP]] -; CHECK: [[ADDRES:%[a-zA-Z_0-9-]+]] = zext i8 [[LOAD]] to i64 -; CHECK: add i64 [[ADDRES]], [[PROMOTED]] -; CHECK: ret define i64 @oneArgPromotionSExtSeveralUse(i8 %arg1, ptr %base) { - %add = add nsw i8 %arg1, 1 +; CHECK-LABEL: define i64 @oneArgPromotionSExtSeveralUse( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = sext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: [[ALMOSTFINALRES:%.*]] = zext i8 [[RES]] to i64 +; CHECK-NEXT: [[FINALRES:%.*]] = add i64 [[ALMOSTFINALRES]], [[ADD]] +; CHECK-NEXT: ret i64 [[FINALRES]] +; + %add = add nsw i8 %arg1, 1 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -249,16 +292,19 @@ define i64 @oneArgPromotionSExtSeveralUse(i8 %arg1, ptr %base) { ; - Setting the operands of the promoted instruction with the promoted values. ; - Moving instruction around (mainly sext when promoting instruction). ; Each type of those promotions has to be undo at least once during this -; specific test. -; CHECK-LABEL: @twoArgsPromotionNest -; CHECK: [[ORIG:%[a-zA-Z_0-9-]+]] = add nsw i32 %arg1, %arg2 -; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 [[ORIG]], [[ORIG]] -; CHECK: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i32 [[ADD]] to i64 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[SEXT]] -; CHECK: ret +; specific test. define i8 @twoArgsPromotionNest(i32 %arg1, i32 %arg2, ptr %base) { +; CHECK-LABEL: define i8 @twoArgsPromotionNest( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTABLEADD1:%.*]] = add nsw i32 [[ARG1]], [[ARG2]] +; CHECK-NEXT: [[PROMOTABLEADD2:%.*]] = add nsw i32 [[PROMOTABLEADD1]], [[PROMOTABLEADD1]] +; CHECK-NEXT: [[SEXTADD:%.*]] = sext i32 [[PROMOTABLEADD2]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %promotableadd1 = add nsw i32 %arg1, %arg2 - %promotableadd2 = add nsw i32 %promotableadd1, %promotableadd1 + %promotableadd2 = add nsw i32 %promotableadd1, %promotableadd1 %sextadd = sext i32 %promotableadd2 to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -270,18 +316,21 @@ define i8 @twoArgsPromotionNest(i32 %arg1, i32 %arg2, ptr %base) { ; The matcher first promotes the add, removes the trunc and promotes ; the sext of arg1. ; Then, the matcher cannot use an addressing mode r + r + r, thus it -; rolls back. -; CHECK-LABEL: @twoArgsNoPromotionRemove -; CHECK: [[SEXTARG1:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i32 -; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 [[SEXTARG1]] to i8 -; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[TRUNC]], %arg2 -; CHECK: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i64 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[SEXT]] -; CHECK: ret +; rolls back. define i8 @twoArgsNoPromotionRemove(i1 %arg1, i8 %arg2, ptr %base) { +; CHECK-LABEL: define i8 @twoArgsNoPromotionRemove( +; CHECK-SAME: i1 [[ARG1:%.*]], i8 [[ARG2:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i32 +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[TRUNC]], [[ARG2]] +; CHECK-NEXT: [[SEXTADD:%.*]] = sext i8 [[ADD]] to i64 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[SEXTADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = sext i1 %arg1 to i32 %trunc = trunc i32 %sextarg1 to i8 - %add = add nsw i8 %trunc, %arg2 + %add = add nsw i8 %trunc, %arg2 %sextadd = sext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %sextadd %res = load i8, ptr %arrayidx @@ -301,29 +350,40 @@ define i8 @twoArgsNoPromotionRemove(i1 %arg1, i8 %arg2, ptr %base) { ; Check that we did not promote anything in the final matching. ; ; -; CHECK-LABEL: @checkProfitability -; CHECK-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg1 to i64 -; CHECK-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg2 to i64 -; CHECK: [[SHL:%[a-zA-Z_0-9-]+]] = shl nsw i32 %arg1, 1 -; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 [[SHL]], %arg2 -; CHECK: [[SEXTADD:%[a-zA-Z_0-9-]+]] = sext i32 [[ADD]] to i64 ; BB then -; CHECK: [[BASE1:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[SEXTADD]] to ptr -; CHECK: [[FULL1:%[a-zA-Z_0-9-]+]] = getelementptr i8, ptr [[BASE1]], i64 48 -; CHECK: load i32, ptr [[FULL1]] ; BB else -; CHECK: [[BASE2:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[SEXTADD]] to ptr -; CHECK: [[FULL2:%[a-zA-Z_0-9-]+]] = getelementptr i8, ptr [[BASE2]], i64 48 -; CHECK: load i32, ptr [[FULL2]] -; CHECK: ret define i32 @checkProfitability(i32 %arg1, i32 %arg2, i1 %test) { +; CHECK-LABEL: define i32 @checkProfitability( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i1 [[TEST:%.*]]) { +; CHECK-NEXT: [[SHL:%.*]] = shl nsw i32 [[ARG1]], 1 +; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[SHL]], [[ARG2]] +; CHECK-NEXT: [[SEXTIDX1:%.*]] = sext i32 [[ADD1]] to i64 +; CHECK-NEXT: br i1 [[TEST]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[SUNKADDR:%.*]] = inttoptr i64 [[SEXTIDX1]] to ptr +; CHECK-NEXT: [[SUNKADDR13:%.*]] = getelementptr i8, ptr [[SUNKADDR]], i64 48 +; CHECK-NEXT: [[RES1:%.*]] = load i32, ptr [[SUNKADDR13]], align 4 +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[ELSE]]: +; CHECK-NEXT: [[SUNKADDR17:%.*]] = inttoptr i64 [[SEXTIDX1]] to ptr +; CHECK-NEXT: [[SUNKADDR18:%.*]] = getelementptr i8, ptr [[SUNKADDR17]], i64 48 +; CHECK-NEXT: [[RES2:%.*]] = load i32, ptr [[SUNKADDR18]], align 4 +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ [[RES1]], %[[THEN]] ], [ [[RES2]], %[[ELSE]] ] +; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[SEXTIDX1]] to i32 +; CHECK-NEXT: [[RES:%.*]] = add i32 [[TMP]], [[TMP1]] +; CHECK-NEXT: [[ADDR:%.*]] = inttoptr i32 [[RES]] to ptr +; CHECK-NEXT: [[FINAL:%.*]] = load i32, ptr [[ADDR]], align 4 +; CHECK-NEXT: ret i32 [[FINAL]] +; %shl = shl nsw i32 %arg1, 1 %add1 = add nsw i32 %shl, %arg2 %sextidx1 = sext i32 %add1 to i64 %tmpptr = inttoptr i64 %sextidx1 to ptr %arrayidx1 = getelementptr i32, ptr %tmpptr, i64 12 br i1 %test, label %then, label %else -then: +then: %res1 = load i32, ptr %arrayidx1 br label %end else: @@ -346,15 +406,47 @@ end: ; We used to crash on this function because we did not return the right ; promoted instruction for %conv.i. ; Make sure we generate the right code now. -; CHECK-LABEL: @fn3 ; %conv.i is used twice and only one of its use is being promoted. ; Use it at the starting point for the matching. -; CHECK: %conv.i = zext i16 [[PLAIN_OPND:%[.a-zA-Z_0-9-]+]] to i32 -; CHECK-NEXT: [[PROMOTED_CONV:%[.a-zA-Z_0-9-]+]] = zext i16 [[PLAIN_OPND]] to i64 -; CHECK-NEXT: [[ADD:%[a-zA-Z_0-9-]+]] = getelementptr i8, ptr %P, i64 [[PROMOTED_CONV]] -; CHECK-NEXT: [[ADDR:%[a-zA-Z_0-9-]+]] = getelementptr i8, ptr [[ADD]], i64 7 -; CHECK-NEXT: load i8, ptr [[ADDR]], align 1 define signext i16 @fn3(ptr nocapture readonly %P) { +; CHECK-LABEL: define signext i16 @fn3( +; CHECK-SAME: ptr nocapture readonly [[P:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: br label %[[WHILE_BODY_I_I:.*]] +; CHECK: [[WHILE_BODY_I_I]]: +; CHECK-NEXT: [[SRC_ADDR_0_I_I:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[INC_I_I:%.*]], %[[WHILE_BODY_I_I]] ] +; CHECK-NEXT: [[INC_I_I]] = add i16 [[SRC_ADDR_0_I_I]], 1 +; CHECK-NEXT: [[IDXPROM_I_I:%.*]] = sext i16 [[SRC_ADDR_0_I_I]] to i64 +; CHECK-NEXT: [[SUNKADDR:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 [[IDXPROM_I_I]] +; CHECK-NEXT: [[SUNKADDR2:%.*]] = getelementptr inbounds i8, ptr [[SUNKADDR]], i64 8 +; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[SUNKADDR2]], align 1 +; CHECK-NEXT: [[CONV2_I_I:%.*]] = zext i8 [[TMP1]] to i32 +; CHECK-NEXT: [[AND_I_I:%.*]] = and i32 [[CONV2_I_I]], 15 +; CHECK-NEXT: store i32 [[AND_I_I]], ptr @a, align 4 +; CHECK-NEXT: [[TOBOOL_I_I:%.*]] = icmp eq i32 [[AND_I_I]], 0 +; CHECK-NEXT: br i1 [[TOBOOL_I_I]], label %[[WHILE_BODY_I_I]], label %[[FN1_EXIT_I:.*]] +; CHECK: [[FN1_EXIT_I]]: +; CHECK-NEXT: [[CONV_I:%.*]] = zext i16 [[INC_I_I]] to i32 +; CHECK-NEXT: [[PROMOTED4:%.*]] = zext i16 [[INC_I_I]] to i64 +; CHECK-NEXT: [[SUNKADDR5:%.*]] = getelementptr i8, ptr [[P]], i64 [[PROMOTED4]] +; CHECK-NEXT: [[SUNKADDR6:%.*]] = getelementptr i8, ptr [[SUNKADDR5]], i64 7 +; CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[SUNKADDR6]], align 1 +; CHECK-NEXT: [[CONV2_I:%.*]] = sext i8 [[TMP2]] to i16 +; CHECK-NEXT: store i16 [[CONV2_I]], ptr @b, align 2 +; CHECK-NEXT: [[SUB4_I:%.*]] = sub nsw i32 0, [[CONV_I]] +; CHECK-NEXT: [[CONV5_I:%.*]] = zext i16 [[CONV2_I]] to i32 +; CHECK-NEXT: [[CMP_I:%.*]] = icmp sgt i32 [[CONV5_I]], [[SUB4_I]] +; CHECK-NEXT: br i1 [[CMP_I]], label %[[IF_THEN_I:.*]], label %[[FN2_EXIT:.*]] +; CHECK: [[IF_THEN_I]]: +; CHECK-NEXT: [[END_I:%.*]] = getelementptr inbounds [[STRUCT_DNS_PACKET:%.*]], ptr [[P]], i64 0, i32 1 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[END_I]], align 4 +; CHECK-NEXT: [[SUB7_I:%.*]] = add i32 [[TMP3]], 65535 +; CHECK-NEXT: [[CONV8_I:%.*]] = trunc i32 [[SUB7_I]] to i16 +; CHECK-NEXT: br label %[[FN2_EXIT]] +; CHECK: [[FN2_EXIT]]: +; CHECK-NEXT: [[RETVAL_0_I:%.*]] = phi i16 [ [[CONV8_I]], %[[IF_THEN_I]] ], [ undef, %[[FN1_EXIT_I]] ] +; CHECK-NEXT: ret i16 [[RETVAL_0_I]] +; entry: %tmp = getelementptr inbounds %struct.dns_packet, ptr %P, i64 0, i32 2 br label %while.body.i.i @@ -399,13 +491,16 @@ fn2.exit: ; preds = %if.then.i, %fn1.exi ; Check that we do not promote an extension if the non-wrapping flag does not ; match the kind of the extension. -; CHECK-LABEL: @noPromotionFlag -; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 %arg1, %arg2 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = zext i32 [[ADD]] to i64 -; CHECK: inttoptr i64 [[PROMOTED]] to ptr -; CHECK: ret define i8 @noPromotionFlag(i32 %arg1, i32 %arg2) { - %add = add nsw i32 %arg1, %arg2 +; CHECK-LABEL: define i8 @noPromotionFlag( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) { +; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[ARG1]], [[ARG2]] +; CHECK-NEXT: [[ZEXTADD:%.*]] = zext i32 [[ADD]] to i64 +; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ZEXTADD]] to ptr +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nsw i32 %arg1, %arg2 %zextadd = zext i32 %add to i64 %base = inttoptr i64 %zextadd to ptr %res = load i8, ptr %base @@ -413,14 +508,17 @@ define i8 @noPromotionFlag(i32 %arg1, i32 %arg2) { } ; Check that we correctly promote both operands of the promotable add with zext. -; CHECK-LABEL: @twoArgsPromotionZExt -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i32 %arg1 to i64 -; CHECK: [[ARG2ZEXT:%[a-zA-Z_0-9-]+]] = zext i32 %arg2 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], [[ARG2ZEXT]] -; CHECK: inttoptr i64 [[PROMOTED]] to ptr -; CHECK: ret define i8 @twoArgsPromotionZExt(i32 %arg1, i32 %arg2) { - %add = add nuw i32 %arg1, %arg2 +; CHECK-LABEL: define i8 @twoArgsPromotionZExt( +; CHECK-SAME: i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = zext i32 [[ARG1]] to i64 +; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i32 [[ARG2]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], [[PROMOTED2]] +; CHECK-NEXT: [[BASE:%.*]] = inttoptr i64 [[ADD]] to ptr +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[BASE]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nuw i32 %arg1, %arg2 %zextadd = zext i32 %add to i64 %base = inttoptr i64 %zextadd to ptr %res = load i8, ptr %base @@ -428,13 +526,16 @@ define i8 @twoArgsPromotionZExt(i32 %arg1, i32 %arg2) { } ; Check that we correctly promote constant arguments. -; CHECK-LABEL: @oneArgPromotionNegativeCstZExt -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], 255 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionNegativeCstZExt(i8 %arg1, ptr %base) { - %add = add nuw i8 %arg1, -1 +; CHECK-LABEL: define i8 @oneArgPromotionNegativeCstZExt( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 255 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; + %add = add nuw i8 %arg1, -1 %zextadd = zext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd %res = load i8, ptr %arrayidx @@ -442,14 +543,17 @@ define i8 @oneArgPromotionNegativeCstZExt(i8 %arg1, ptr %base) { } ; Check that we are able to merge two zero extensions. -; CHECK-LABEL: @oneArgPromotionZExtZExt -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionZExtZExt(i8 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionZExtZExt( +; CHECK-SAME: i8 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i8 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %zext = zext i8 %arg1 to i32 - %add = add nuw i32 %zext, 1 + %add = add nuw i32 %zext, 1 %zextadd = zext i32 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd %res = load i8, ptr %arrayidx @@ -458,17 +562,20 @@ define i8 @oneArgPromotionZExtZExt(i8 %arg1, ptr %base) { ; Check that we do not promote truncate when the dropped bits ; are of a different kind. -; CHECK-LABEL: @oneArgPromotionBlockTruncZExt -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i32 -; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 [[ARG1SEXT]] to i8 -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[ARG1TRUNC]] to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionBlockTruncZExt(i1 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionBlockTruncZExt( +; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i32 +; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[SEXTARG1]] to i8 +; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[TRUNC]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = sext i1 %arg1 to i32 %trunc = trunc i32 %sextarg1 to i8 - %add = add nuw i8 %trunc, 1 + %add = add nuw i8 %trunc, 1 %zextadd = zext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd %res = load i8, ptr %arrayidx @@ -477,15 +584,18 @@ define i8 @oneArgPromotionBlockTruncZExt(i1 %arg1, ptr %base) { ; Check that we are able to promote truncate when we know all the bits ; that are dropped. -; CHECK-LABEL: @oneArgPromotionPassTruncZExt -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i1 %arg1 to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionPassTruncZExt(i1 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionPassTruncZExt( +; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[PROMOTED2:%.*]] = zext i1 [[ARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED2]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = zext i1 %arg1 to i32 %trunc = trunc i32 %sextarg1 to i8 - %add = add nuw i8 %trunc, 1 + %add = add nuw i8 %trunc, 1 %zextadd = zext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd %res = load i8, ptr %arrayidx @@ -493,15 +603,18 @@ define i8 @oneArgPromotionPassTruncZExt(i1 %arg1, ptr %base) { } ; Check that we do not promote sext with zext. -; CHECK-LABEL: @oneArgPromotionBlockSExtZExt -; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i8 -; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[ARG1SEXT]] to i64 -; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nuw i64 [[ARG1ZEXT]], 1 -; CHECK: getelementptr inbounds i8, ptr %base, i64 [[PROMOTED]] -; CHECK: ret define i8 @oneArgPromotionBlockSExtZExt(i1 %arg1, ptr %base) { +; CHECK-LABEL: define i8 @oneArgPromotionBlockSExtZExt( +; CHECK-SAME: i1 [[ARG1:%.*]], ptr [[BASE:%.*]]) { +; CHECK-NEXT: [[SEXTARG1:%.*]] = sext i1 [[ARG1]] to i8 +; CHECK-NEXT: [[PROMOTED:%.*]] = zext i8 [[SEXTARG1]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = add nuw i64 [[PROMOTED]], 1 +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[ADD]] +; CHECK-NEXT: [[RES:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; CHECK-NEXT: ret i8 [[RES]] +; %sextarg1 = sext i1 %arg1 to i8 - %add = add nuw i8 %sextarg1, 1 + %add = add nuw i8 %sextarg1, 1 %zextadd = zext i8 %add to i64 %arrayidx = getelementptr inbounds i8, ptr %base, i64 %zextadd %res = load i8, ptr %arrayidx