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2 changes: 2 additions & 0 deletions llvm/include/llvm/Target/TargetSelectionDAG.td
Original file line number Diff line number Diff line change
Expand Up @@ -353,6 +353,8 @@ class SDNode<string opcode, SDTypeProfile typeprof,
string SDClass = sdclass;
let Properties = props;
SDTypeProfile TypeProfile = typeprof;
bit IsStrictFP = false;
bits<64> TSFlags = 0;
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TSFlags in SDNodeDesc in #119709 is declared as uint32_t. Are you going to enlarge that or should this be 32?

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Thanks for spotting this. I think 32 bits should be more than enough, at least for now.

}

// Special TableGen-recognized dag nodes
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73 changes: 73 additions & 0 deletions llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,73 @@
// RUN: split-file %s %t

//--- test1.td
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test1.td | FileCheck %t/test1.td

include "llvm/Target/Target.td"

def MyTarget : Target;

def my_node_a : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
def my_node_b : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, f32>]>>;

// CHECK: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE = ISD::BUILTIN_OP_END,
// CHECK-NEXT: };

// CHECK: static const char MyTargetSDNodeNames[] =
// CHECK-NEXT: "MyTargetISD::NODE\0"
// CHECK-NEXT: "\0";

// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// CHECK-NEXT: {1, 0, 0, 0, 0, 0, 0, 0}, // NODE
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);


//--- test2.td
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test2.td | FileCheck %t/test2.td

include "llvm/Target/Target.td"

def MyTarget : Target;

def my_node_1a : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
def my_node_1b : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
def my_node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
def my_node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, untyped>]>>;

// CHECK: namespace llvm::MyTargetISD {
// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
// CHECK-NEXT: NODE_2,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_2 + 1;
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD

// CHECK: static const char MyTargetSDNodeNames[] =
// CHECK-NEXT: "MyTargetISD::NODE_1\0"
// CHECK-NEXT: "MyTargetISD::NODE_2\0"
// CHECK-NEXT: "\0";

// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// CHECK-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i32},
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// CHECK-NEXT: {1, 0, 0, 0, 0, 0, 0, 1}, // NODE_1
// CHECK-NEXT: {1, 0, 0, 0, 0, 20, 0, 0}, // NODE_2
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// CHECK-NEXT: /*NumOpcodes=*/2, MyTargetSDNodeDescs,
// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
85 changes: 85 additions & 0 deletions llvm/test/TableGen/SDNodeInfoEmitter/basic.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,85 @@
// RUN: split-file %s %t

//--- no-nodes.td
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/no-nodes.td \
// RUN: | FileCheck %t/no-nodes.td

include "llvm/Target/Target.td"

def MyTarget : Target;

// CHECK: #ifdef GET_SDNODE_ENUM
// CHECK-NEXT: #undef GET_SDNODE_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm::MyTargetISD {
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK-EMPTY:
// CHECK-NEXT: #endif // GET_SDNODE_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: #ifdef GET_SDNODE_DESC
// CHECK-NEXT: #undef GET_SDNODE_DESC
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm {
// CHECK-EMPTY:
// CHECK-NEXT: #ifdef __GNUC__
// CHECK-NEXT: #pragma GCC diagnostic push
// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
// CHECK-NEXT: #endif
// CHECK-NEXT: static const char MyTargetSDNodeNames[] =
// CHECK-NEXT: "\0";
// CHECK-NEXT: #ifdef __GNUC__
// CHECK-NEXT: #pragma GCC diagnostic pop
// CHECK-NEXT: #endif
// CHECK-EMPTY:
// CHECK-NEXT: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// CHECK-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm


//--- trivial-node.td
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/trivial-node.td \
// RUN: | FileCheck %t/trivial-node.td

include "llvm/Target/Target.td"

def MyTarget : Target;

def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;

// CHECK: namespace llvm::MyTargetISD {
// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD

// CHECK: static const char MyTargetSDNodeNames[] =
// CHECK-NEXT: "MyTargetISD::NOOP\0"
// CHECK-NEXT: "\0";

// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// CHECK-NEXT: {0, 0, 0, 0, 0, 0, 0, 0}, // NOOP
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
62 changes: 62 additions & 0 deletions llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,62 @@
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s -sdnode-namespace=EmptyISD \
// RUN: | FileCheck %s -check-prefix=EMPTY

// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s \
// RUN: | FileCheck %s --check-prefixes=COMMON,TARGET -DNS=MyTargetISD
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s -sdnode-namespace=MyCustomISD \
// RUN: | FileCheck %s -check-prefixes=COMMON,CUSTOM -DNS=MyCustomISD

include "llvm/Target/Target.td"

def MyTarget : Target;

def node_1 : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i1>]>>;
def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>;

// EMPTY: namespace llvm::EmptyISD {
// EMPTY-EMPTY:
// EMPTY-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
// EMPTY-EMPTY:
// EMPTY-NEXT: } // namespace llvm::EmptyISD

// EMPTY: static const char MyTargetSDNodeNames[] =
// EMPTY-NEXT: "\0";

// EMPTY: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// EMPTY-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
// EMPTY-NEXT: };
// EMPTY-EMPTY:
// EMPTY-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// EMPTY-NEXT: };
// EMPTY-EMPTY:
// EMPTY-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// EMPTY-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
// EMPTY-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);

// COMMON: namespace llvm::[[NS]] {
// COMMON-EMPTY:
// COMMON-NEXT: enum GenNodeType : unsigned {
// COMMON-NEXT: NODE = ISD::BUILTIN_OP_END,
// COMMON-NEXT: };
// COMMON-EMPTY:
// COMMON-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE + 1;
// COMMON-EMPTY:
// COMMON-NEXT: } // namespace llvm::[[NS]]

// COMMON: static const char MyTargetSDNodeNames[] =
// COMMON-NEXT: "[[NS]]::NODE\0"
// COMMON-NEXT: "\0";

// COMMON: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// TARGET-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i1},
// CUSTOM-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i2},
// COMMON-NEXT: };
// COMMON-EMPTY:
// COMMON-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// TARGET-NEXT: {1, 0, 0, 0, 0, 0, 0, 1}, // NODE
// CUSTOM-NEXT: {0, 1, 0, 0, 0, 0, 0, 1}, // NODE
// COMMON-NEXT: };
// COMMON-EMPTY:
// COMMON-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// COMMON-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
// COMMON-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
91 changes: 91 additions & 0 deletions llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,91 @@
// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s 2> %t.warn | FileCheck %s
// RUN: FileCheck --check-prefix=WARN --implicit-check-not=warning %s < %t.warn

// RUN: llvm-tblgen -gen-sd-node-info -warn-on-skipped-nodes=false \
// RUN: -I %p/../../../include %s 2> %t.nowarn | FileCheck %s
// RUN: not test -s %t.nowarn

include "llvm/Target/Target.td"

def MyTarget : Target;

// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
def bad_name_1 : SDNode<"", SDTypeProfile<0, 0, []>>;

// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
def bad_name_2 : SDNode<"NODE", SDTypeProfile<0, 0, []>>;

// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
def bad_name_3 : SDNode<"MyTargetISD::", SDTypeProfile<0, 0, []>>;

// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
def bad_name_4 : SDNode<"MyISD::", SDTypeProfile<0, 0, []>>;

// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
def bad_name_5 : SDNode<"::NODE", SDTypeProfile<0, 0, []>>;


// Standard namespace.
def silent_1 : SDNode<"ISD::SILENT", SDTypeProfile<0, 0, []>>;

// Different namespace.
def silent_2 : SDNode<"MyISD::SILENT", SDTypeProfile<0, 0, []>>;


// Different number of results.
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
def node_1a : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<0, 0, []>>;
def node_1b : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, []>>;

// Different number of operands.
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
def node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<0, 0, []>>;
def node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<0, 1, []>>;

// Different value of IsStrictFP.
// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
let IsStrictFP = true in
def node_3a : SDNode<"MyTargetISD::NODE_3", SDTypeProfile<0, 0, []>>;
def node_3b : SDNode<"MyTargetISD::NODE_3", SDTypeProfile<0, 0, []>>;

// Different value of TSFlags.
// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
let TSFlags = 1 in
def node_4a : SDNode<"MyTargetISD::NODE_4", SDTypeProfile<0, 0, []>>;
def node_4b : SDNode<"MyTargetISD::NODE_4", SDTypeProfile<0, 0, []>>;

// Different properties.
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
def node_5a : SDNode<"MyTargetISD::NODE_5", SDTypeProfile<0, 0, []>>;
def node_5b : SDNode<"MyTargetISD::NODE_5", SDTypeProfile<0, 0, []>, [SDNPHasChain]>;


// CHECK: enum GenNodeType : unsigned {
// CHECK-NEXT: COMPAT = ISD::BUILTIN_OP_END,
// CHECK-NEXT: };

// CHECK: static const char MyTargetSDNodeNames[] =
// CHECK-NEXT: "MyTargetISD::COMPAT\0"
// CHECK-NEXT: "\0";

// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
// CHECK-NEXT: {1, -1, 0, 0, 0, 0, 0, 0}, // COMPAT
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);

def compat_a : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, []>>;
def compat_b : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, [SDTCisVT<0, untyped>]>>;
def compat_c : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, [SDTCisVT<0, untyped>]>,
[SDNPCommutative, SDNPAssociative, SDNPMayStore, SDNPMayLoad, SDNPSideEffect]>;
1 change: 1 addition & 0 deletions llvm/utils/TableGen/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,7 @@ add_tablegen(llvm-tblgen LLVM
PseudoLoweringEmitter.cpp
RegisterBankEmitter.cpp
RegisterInfoEmitter.cpp
SDNodeInfoEmitter.cpp
SearchableTableEmitter.cpp
SubtargetEmitter.cpp
WebAssemblyDisassemblerEmitter.cpp
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