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[AVX10.2] Update convert chapter intrinsic and mnemonics names #123656

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Merged
phoebewang merged 10 commits into from
Jan 23, 2025
Merged

[AVX10.2] Update convert chapter intrinsic and mnemonics names #123656

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29caa20
somewhat working
mikolaj-pirog Jan 20, 2025
215174f
Add headers, fix test (ordering)
mikolaj-pirog Jan 20, 2025
0f0cdca
formatting:
mikolaj-pirog Jan 21, 2025
d522b1c
Fix testing
mikolaj-pirog Jan 21, 2025
39fcbc3
Add missed intrins
mikolaj-pirog Jan 21, 2025
d5171da
Replace pbf8, phf8 -> bf8, hf8
mikolaj-pirog Jan 21, 2025
607d3b6
Formatting
mikolaj-pirog Jan 21, 2025
36346dd
Rebasing
mikolaj-pirog Jan 23, 2025
a030100
fix conflict
mikolaj-pirog Jan 23, 2025
f56e8a1
Fix ordering
mikolaj-pirog Jan 23, 2025
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48 changes: 24 additions & 24 deletions clang/include/clang/Basic/BuiltinsX86.td
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Original file line number Diff line number Diff line change
Expand Up @@ -5191,51 +5191,51 @@ let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] i
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtne2ph2bf8_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
def vcvt2ph2bf8_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtne2ph2bf8_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
def vcvt2ph2bf8_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtne2ph2bf8_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
def vcvt2ph2bf8_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtne2ph2bf8s_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
def vcvt2ph2bf8s_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtne2ph2bf8s_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
def vcvt2ph2bf8s_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtne2ph2bf8s_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
def vcvt2ph2bf8s_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtne2ph2hf8_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
def vcvt2ph2hf8_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtne2ph2hf8_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
def vcvt2ph2hf8_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtne2ph2hf8_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
def vcvt2ph2hf8_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtne2ph2hf8s_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
def vcvt2ph2hf8s_128 : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<8, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtne2ph2hf8s_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
def vcvt2ph2hf8s_256 : X86Builtin<"_Vector<32, char>(_Vector<16, _Float16>, _Vector<16, _Float16>)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtne2ph2hf8s_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
def vcvt2ph2hf8s_512 : X86Builtin<"_Vector<64, char>(_Vector<32, _Float16>, _Vector<32, _Float16>)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
Expand All @@ -5251,51 +5251,51 @@ let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] i
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtneph2bf8_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
def vcvtph2bf8_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtneph2bf8_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
def vcvtph2bf8_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtneph2bf8_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
def vcvtph2bf8_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtneph2bf8s_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
def vcvtph2bf8s_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtneph2bf8s_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
def vcvtph2bf8s_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtneph2bf8s_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
def vcvtph2bf8s_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtneph2hf8_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
def vcvtph2hf8_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtneph2hf8_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
def vcvtph2hf8_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtneph2hf8_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
def vcvtph2hf8_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def vcvtneph2hf8s_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
def vcvtph2hf8s_128_mask : X86Builtin<"_Vector<16, char>(_Vector<8, _Float16>, _Vector<16, char>, unsigned char)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def vcvtneph2hf8s_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
def vcvtph2hf8s_256_mask : X86Builtin<"_Vector<16, char>(_Vector<16, _Float16>, _Vector<16, char>, unsigned short)">;
}

let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
def vcvtneph2hf8s_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
def vcvtph2hf8s_512_mask : X86Builtin<"_Vector<32, char>(_Vector<32, _Float16>, _Vector<32, char>, unsigned int)">;
}

let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
Expand Down
120 changes: 58 additions & 62 deletions clang/lib/Headers/avx10_2_512convertintrin.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -137,79 +137,79 @@ _mm512_maskz_cvtbiassph_phf8(__mmask32 __U, __m512i __A, __m512h __B) {
(__mmask32)__U);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtne2ph_pbf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2bf8_512((__v32hf)(__A),
(__v32hf)(__B));
static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_cvt2ph_bf8(__m512h __A,
__m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2bf8_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_pbf8(
__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvt2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtne2ph_pbf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvt2ph_bf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtne2ph_pbf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvt2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtne2ph_pbf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvt2ph_bf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtnes2ph_pbf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2bf8s_512((__v32hf)(__A),
(__v32hf)(__B));
_mm512_cvts2ph_bf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2bf8s_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtnes2ph_pbf8(
__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvts2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_pbf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtnes2ph_pbf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvts2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_pbf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtne2ph_phf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2hf8_512((__v32hf)(__A),
(__v32hf)(__B));
static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_cvt2ph_hf8(__m512h __A,
__m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2hf8_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_phf8(
__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvt2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtne2ph_phf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvt2ph_hf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtne2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvt2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtne2ph_phf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvt2ph_hf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtnes2ph_phf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2hf8s_512((__v32hf)(__A),
(__v32hf)(__B));
_mm512_cvts2ph_hf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvt2ph2hf8s_512((__v32hf)(__A),
(__v32hf)(__B));
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtnes2ph_phf8(
__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_mask_cvts2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_phf8(__A, __B), (__v64qi)__W);
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B), (__v64qi)__W);
}

static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtnes2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
_mm512_maskz_cvts2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
(__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_phf8(__A, __B),
(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B),
(__v64qi)(__m512i)_mm512_setzero_si512());
}

Expand All @@ -231,75 +231,71 @@ _mm512_maskz_cvtnehf8_ph(__mmask32 __U, __m256i __A) {
(__v32qi)__A, (__v32hf)(__m512h)_mm512_setzero_ph(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtneph_pbf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtph_bf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtneph_pbf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
_mm512_mask_cvtph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtneph_pbf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
_mm512_maskz_cvtph_bf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtnesph_pbf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_bf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtnesph_pbf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
_mm512_mask_cvtsph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtnesph_pbf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
_mm512_maskz_cvtsph_bf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtneph_phf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtph_hf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtneph_phf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
_mm512_mask_cvtph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtneph_phf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
_mm512_maskz_cvtph_hf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtnesph_phf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_hf8(__m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_mask_cvtnesph_phf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
_mm512_mask_cvtsph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
}

static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtnesph_phf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
_mm512_maskz_cvtsph_hf8(__mmask32 __U, __m512h __A) {
return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
}

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