From 190ec156a3838b18155019de670c521e907da1f5 Mon Sep 17 00:00:00 2001 From: Justin Fargnoli Date: Thu, 30 Jan 2025 16:47:53 -0800 Subject: [PATCH 1/2] Add missing tests --- llvm/test/CodeGen/NVPTX/cp-async-bulk.ll | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll b/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll index cbb53df4a49b0..fcd51266fd170 100644 --- a/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll +++ b/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll @@ -131,6 +131,19 @@ define void @cp_async_bulk_prefetch(ptr addrspace(1) %src, i32 %size, i64 %ch) { ; CHECK-PTX64-NEXT: cp.async.bulk.prefetch.L2.global.L2::cache_hint [%rd1], %r1, %rd2; ; CHECK-PTX64-NEXT: cp.async.bulk.prefetch.L2.global [%rd1], %r1; ; CHECK-PTX64-NEXT: ret; +; +; CHECK-PTX-SHARED32-LABEL: cp_async_bulk_prefetch( +; CHECK-PTX-SHARED32: { +; CHECK-PTX-SHARED32-NEXT: .reg .b32 %r<2>; +; CHECK-PTX-SHARED32-NEXT: .reg .b64 %rd<3>; +; CHECK-PTX-SHARED32-EMPTY: +; CHECK-PTX-SHARED32-NEXT: // %bb.0: +; CHECK-PTX-SHARED32-NEXT: ld.param.u64 %rd1, [cp_async_bulk_prefetch_param_0]; +; CHECK-PTX-SHARED32-NEXT: ld.param.u32 %r1, [cp_async_bulk_prefetch_param_1]; +; CHECK-PTX-SHARED32-NEXT: ld.param.u64 %rd2, [cp_async_bulk_prefetch_param_2]; +; CHECK-PTX-SHARED32-NEXT: cp.async.bulk.prefetch.L2.global.L2::cache_hint [%rd1], %r1, %rd2; +; CHECK-PTX-SHARED32-NEXT: cp.async.bulk.prefetch.L2.global [%rd1], %r1; +; CHECK-PTX-SHARED32-NEXT: ret; tail call void @llvm.nvvm.cp.async.bulk.prefetch.L2(ptr addrspace(1) %src, i32 %size, i64 %ch, i1 1) tail call void @llvm.nvvm.cp.async.bulk.prefetch.L2(ptr addrspace(1) %src, i32 %size, i64 0, i1 0) ret void From 0e45774d1fcfebf4b05d743b18ff3a651b7c69c1 Mon Sep 17 00:00:00 2001 From: Justin Fargnoli Date: Fri, 31 Jan 2025 12:13:09 -0800 Subject: [PATCH 2/2] Add common CHECK prefix --- llvm/test/CodeGen/NVPTX/cp-async-bulk.ll | 41 ++++++++---------------- 1 file changed, 14 insertions(+), 27 deletions(-) diff --git a/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll b/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll index fcd51266fd170..aa8f553351b46 100644 --- a/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll +++ b/llvm/test/CodeGen/NVPTX/cp-async-bulk.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80| FileCheck --check-prefixes=CHECK-PTX64 %s -; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80 --nvptx-short-ptr| FileCheck --check-prefixes=CHECK-PTX-SHARED32 %s +; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80| FileCheck --check-prefixes=CHECK,CHECK-PTX64 %s +; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80 --nvptx-short-ptr| FileCheck --check-prefixes=CHECK,CHECK-PTX-SHARED32 %s ; RUN: %if ptxas-12.3 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80| %ptxas-verify -arch=sm_90 %} ; RUN: %if ptxas-12.3 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_90 -mattr=+ptx80 --nvptx-short-ptr| %ptxas-verify -arch=sm_90 %} @@ -119,31 +119,18 @@ define void @cp_async_bulk_cta_to_cluster(ptr addrspace(3) %src, ptr addrspace(3 } define void @cp_async_bulk_prefetch(ptr addrspace(1) %src, i32 %size, i64 %ch) { -; CHECK-PTX64-LABEL: cp_async_bulk_prefetch( -; CHECK-PTX64: { -; CHECK-PTX64-NEXT: .reg .b32 %r<2>; -; CHECK-PTX64-NEXT: .reg .b64 %rd<3>; -; CHECK-PTX64-EMPTY: -; CHECK-PTX64-NEXT: // %bb.0: -; CHECK-PTX64-NEXT: ld.param.u64 %rd1, [cp_async_bulk_prefetch_param_0]; -; CHECK-PTX64-NEXT: ld.param.u32 %r1, [cp_async_bulk_prefetch_param_1]; -; CHECK-PTX64-NEXT: ld.param.u64 %rd2, [cp_async_bulk_prefetch_param_2]; -; CHECK-PTX64-NEXT: cp.async.bulk.prefetch.L2.global.L2::cache_hint [%rd1], %r1, %rd2; -; CHECK-PTX64-NEXT: cp.async.bulk.prefetch.L2.global [%rd1], %r1; -; CHECK-PTX64-NEXT: ret; -; -; CHECK-PTX-SHARED32-LABEL: cp_async_bulk_prefetch( -; CHECK-PTX-SHARED32: { -; CHECK-PTX-SHARED32-NEXT: .reg .b32 %r<2>; -; CHECK-PTX-SHARED32-NEXT: .reg .b64 %rd<3>; -; CHECK-PTX-SHARED32-EMPTY: -; CHECK-PTX-SHARED32-NEXT: // %bb.0: -; CHECK-PTX-SHARED32-NEXT: ld.param.u64 %rd1, [cp_async_bulk_prefetch_param_0]; -; CHECK-PTX-SHARED32-NEXT: ld.param.u32 %r1, [cp_async_bulk_prefetch_param_1]; -; CHECK-PTX-SHARED32-NEXT: ld.param.u64 %rd2, [cp_async_bulk_prefetch_param_2]; -; CHECK-PTX-SHARED32-NEXT: cp.async.bulk.prefetch.L2.global.L2::cache_hint [%rd1], %r1, %rd2; -; CHECK-PTX-SHARED32-NEXT: cp.async.bulk.prefetch.L2.global [%rd1], %r1; -; CHECK-PTX-SHARED32-NEXT: ret; +; CHECK-LABEL: cp_async_bulk_prefetch( +; CHECK: { +; CHECK-NEXT: .reg .b32 %r<2>; +; CHECK-NEXT: .reg .b64 %rd<3>; +; CHECK-EMPTY: +; CHECK-NEXT: // %bb.0: +; CHECK-NEXT: ld.param.u64 %rd1, [cp_async_bulk_prefetch_param_0]; +; CHECK-NEXT: ld.param.u32 %r1, [cp_async_bulk_prefetch_param_1]; +; CHECK-NEXT: ld.param.u64 %rd2, [cp_async_bulk_prefetch_param_2]; +; CHECK-NEXT: cp.async.bulk.prefetch.L2.global.L2::cache_hint [%rd1], %r1, %rd2; +; CHECK-NEXT: cp.async.bulk.prefetch.L2.global [%rd1], %r1; +; CHECK-NEXT: ret; tail call void @llvm.nvvm.cp.async.bulk.prefetch.L2(ptr addrspace(1) %src, i32 %size, i64 %ch, i1 1) tail call void @llvm.nvvm.cp.async.bulk.prefetch.L2(ptr addrspace(1) %src, i32 %size, i64 0, i1 0) ret void