diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp index fa57ae183bb84..d6a16143fe9e9 100644 --- a/llvm/lib/TargetParser/Host.cpp +++ b/llvm/lib/TargetParser/Host.cpp @@ -493,6 +493,7 @@ StringRef sys::detail::getHostCPUNameForRISCV(StringRef ProcCpuinfoContent) { } return StringSwitch(UArch) + .Case("eswin,eic770x", "sifive-p550") .Case("sifive,u74-mc", "sifive-u74") .Case("sifive,bullet0", "sifive-u74") .Default(""); diff --git a/llvm/unittests/TargetParser/Host.cpp b/llvm/unittests/TargetParser/Host.cpp index c5b96e1df904e..6eb13649a5904 100644 --- a/llvm/unittests/TargetParser/Host.cpp +++ b/llvm/unittests/TargetParser/Host.cpp @@ -405,6 +405,19 @@ uarch : sifive,u74-mc EXPECT_EQ( sys::detail::getHostCPUNameForRISCV("uarch : sifive,bullet0\n"), "sifive-u74"); + + const StringRef SifiveP550MCProcCPUInfo = R"( +processor : 0 +hart : 2 +isa : rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf +mmu : sv48 +uarch : eswin,eic770x +)"; + EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveP550MCProcCPUInfo), + "sifive-p550"); + EXPECT_EQ( + sys::detail::getHostCPUNameForRISCV("uarch : eswin,eic770x\n"), + "sifive-p550"); } static bool runAndGetCommandOutput(