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[AMDGPU] Avoid repeated hash lookups (NFC) #126001

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Merged
merged 1 commit into from
Feb 6, 2025
Merged

[AMDGPU] Avoid repeated hash lookups (NFC) #126001

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14 changes: 8 additions & 6 deletions llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2174,12 +2174,13 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(

// Step1: Find the base-registers and a 64bit constant offset.
MachineOperand &Base = *TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
auto [It, Inserted] = Visited.try_emplace(&MI);
MemAddress MAddr;
if (!Visited.contains(&MI)) {
if (Inserted) {
processBaseWithConstOffset(Base, MAddr);
Visited[&MI] = MAddr;
It->second = MAddr;
} else
MAddr = Visited[&MI];
MAddr = It->second;

if (MAddr.Offset == 0) {
LLVM_DEBUG(dbgs() << " Failed to extract constant-offset or there are no"
Expand Down Expand Up @@ -2239,11 +2240,12 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
const MachineOperand &BaseNext =
*TII->getNamedOperand(MINext, AMDGPU::OpName::vaddr);
MemAddress MAddrNext;
if (!Visited.contains(&MINext)) {
auto [It, Inserted] = Visited.try_emplace(&MINext);
if (Inserted) {
processBaseWithConstOffset(BaseNext, MAddrNext);
Visited[&MINext] = MAddrNext;
It->second = MAddrNext;
} else
MAddrNext = Visited[&MINext];
MAddrNext = It->second;

if (MAddrNext.Base.LoReg != MAddr.Base.LoReg ||
MAddrNext.Base.HiReg != MAddr.Base.HiReg ||
Expand Down