diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index dc8439b288957..204eeaeb31ee3 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -61,6 +61,9 @@ Changes to the LLVM IR Changes to LLVM infrastructure ------------------------------ +* Removed support for target intrinsics being defined in the target directories + themselves (i.e., the `TargetIntrinsicInfo` class). + Changes to building LLVM ------------------------ diff --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h index 3ec46afa781ab..b4e704654495c 100644 --- a/llvm/include/llvm/CodeGen/MachineOperand.h +++ b/llvm/include/llvm/CodeGen/MachineOperand.h @@ -32,7 +32,6 @@ class MachineRegisterInfo; class MCCFIInstruction; class MDNode; class ModuleSlotTracker; -class TargetIntrinsicInfo; class TargetRegisterInfo; class hash_code; class raw_ostream; @@ -283,8 +282,7 @@ class MachineOperand { /// Providing a valid \p TRI and \p IntrinsicInfo results in a more /// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the /// function will try to pick it up from the parent. - void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr, - const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const; + void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr) const; /// More complex way of printing a MachineOperand. /// \param TypeToPrint specifies the generic type to be printed on uses and @@ -310,14 +308,12 @@ class MachineOperand { void print(raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint, std::optional OpIdx, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned TiedOperandIdx, - const TargetRegisterInfo *TRI, - const TargetIntrinsicInfo *IntrinsicInfo) const; + const TargetRegisterInfo *TRI) const; /// Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level /// type to be printed the same way the full version of print(...) does it. void print(raw_ostream &os, LLT TypeToPrint, - const TargetRegisterInfo *TRI = nullptr, - const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const; + const TargetRegisterInfo *TRI = nullptr) const; void dump() const; diff --git a/llvm/include/llvm/Target/TargetIntrinsicInfo.h b/llvm/include/llvm/Target/TargetIntrinsicInfo.h deleted file mode 100644 index dc59f11c8d9a1..0000000000000 --- a/llvm/include/llvm/Target/TargetIntrinsicInfo.h +++ /dev/null @@ -1,68 +0,0 @@ -//===-- llvm/Target/TargetIntrinsicInfo.h - Instruction Info ----*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file describes the target intrinsic instructions to the code generator. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_TARGET_TARGETINTRINSICINFO_H -#define LLVM_TARGET_TARGETINTRINSICINFO_H - -#include "llvm/ADT/StringRef.h" -#include - -namespace llvm { - -class Function; -class Module; -class Type; - -//--------------------------------------------------------------------------- -/// -/// TargetIntrinsicInfo - Interface to description of machine instruction set -/// -class TargetIntrinsicInfo { - TargetIntrinsicInfo(const TargetIntrinsicInfo &) = delete; - void operator=(const TargetIntrinsicInfo &) = delete; -public: - TargetIntrinsicInfo(); - virtual ~TargetIntrinsicInfo(); - - /// Return the name of a target intrinsic, e.g. "llvm.bfin.ssync". - /// The Tys and numTys parameters are for intrinsics with overloaded types - /// (e.g., those using iAny or fAny). For a declaration for an overloaded - /// intrinsic, Tys should point to an array of numTys pointers to Type, - /// and must provide exactly one type for each overloaded type in the - /// intrinsic. - virtual std::string getName(unsigned IID, Type **Tys = nullptr, - unsigned numTys = 0) const = 0; - - /// Look up target intrinsic by name. Return intrinsic ID or 0 for unknown - /// names. - virtual unsigned lookupName(const char *Name, unsigned Len) const =0; - - unsigned lookupName(StringRef Name) const { - return lookupName(Name.data(), Name.size()); - } - - /// Return the target intrinsic ID of a function, or 0. - virtual unsigned getIntrinsicID(const Function *F) const; - - /// Returns true if the intrinsic can be overloaded. - virtual bool isOverloaded(unsigned IID) const = 0; - - /// Create or insert an LLVM Function declaration for an intrinsic, - /// and return it. The Tys and numTys are for intrinsics with overloaded - /// types. See above for more information. - virtual Function *getDeclaration(Module *M, unsigned ID, Type **Tys = nullptr, - unsigned numTys = 0) const = 0; -}; - -} // End llvm namespace - -#endif diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h index b1ec0b9c07c17..27eeb415ed644 100644 --- a/llvm/include/llvm/Target/TargetMachine.h +++ b/llvm/include/llvm/Target/TargetMachine.h @@ -55,7 +55,6 @@ class ScheduleDAGInstrs; class SMDiagnostic; class SMRange; class Target; -class TargetIntrinsicInfo; class TargetIRAnalysis; class TargetTransformInfo; class TargetLoweringObjectFile; @@ -242,11 +241,6 @@ class TargetMachine { const MCInstrInfo *getMCInstrInfo() const { return MII.get(); } const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); } - /// If intrinsic information is available, return it. If not, return null. - virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { - return nullptr; - } - bool requiresStructuredCFG() const { return RequireStructuredCFG; } void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; } diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 362d856e76a8a..d01de29826cad 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -79,7 +79,6 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Transforms/Utils/Local.h" #include "llvm/Transforms/Utils/MemoryOpRemark.h" @@ -2758,7 +2757,6 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { return false; const CallInst &CI = cast(U); - auto TII = MF->getTarget().getIntrinsicInfo(); const Function *F = CI.getCalledFunction(); // FIXME: support Windows dllimport function calls and calls through @@ -2782,11 +2780,8 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { diagnoseDontCall(CI); Intrinsic::ID ID = Intrinsic::not_intrinsic; - if (F && F->isIntrinsic()) { + if (F && F->isIntrinsic()) ID = F->getIntrinsicID(); - if (TII && ID == Intrinsic::not_intrinsic) - ID = static_cast(TII->getIntrinsicID(F)); - } if (!F || !F->isIntrinsic() || ID == Intrinsic::not_intrinsic) return translateCallBase(CI, MIRBuilder); diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp index b44e1e10fef91..a4e513d05f9cd 100644 --- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp @@ -66,7 +66,6 @@ #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/SMLoc.h" #include "llvm/Support/SourceMgr.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include #include @@ -2669,13 +2668,8 @@ bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) { if (expectAndConsume(MIToken::rparen)) return error("expected ')' to terminate intrinsic name"); - // Find out what intrinsic we're dealing with, first try the global namespace - // and then the target's private intrinsics if that fails. - const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo(); + // Find out what intrinsic we're dealing with. Intrinsic::ID ID = Intrinsic::lookupIntrinsicID(Name); - if (ID == Intrinsic::not_intrinsic && TII) - ID = static_cast(TII->lookupName(Name)); - if (ID == Intrinsic::not_intrinsic) return error("unknown intrinsic name"); Dest = MachineOperand::CreateIntrinsicID(ID); diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index e936b16531373..789c628a64a23 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -1007,10 +1007,9 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, unsigned TiedOperandIdx = 0; if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); - const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo(); Op.print(OS, MST, TypeToPrint, OpIdx, PrintDef, /*IsStandalone=*/false, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII); - OS << formatOperandComment(MOComment); + ShouldPrintRegisterTies, TiedOperandIdx, TRI); + OS << formatOperandComment(MOComment); break; } case MachineOperand::MO_FrameIndex: diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index a9f756b684360..52c977a3651a3 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -70,18 +70,15 @@ static const MachineFunction *getMFIfAvailable(const MachineInstr &MI) { return nullptr; } -// Try to crawl up to the machine function and get TRI and IntrinsicInfo from -// it. +// Try to crawl up to the machine function and get TRI/MRI/TII from it. static void tryToGetTargetInfo(const MachineInstr &MI, const TargetRegisterInfo *&TRI, const MachineRegisterInfo *&MRI, - const TargetIntrinsicInfo *&IntrinsicInfo, const TargetInstrInfo *&TII) { if (const MachineFunction *MF = getMFIfAvailable(MI)) { TRI = MF->getSubtarget().getRegisterInfo(); MRI = &MF->getRegInfo(); - IntrinsicInfo = MF->getTarget().getIntrinsicInfo(); TII = MF->getSubtarget().getInstrInfo(); } } @@ -1753,8 +1750,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, // We can be a bit tidier if we know the MachineFunction. const TargetRegisterInfo *TRI = nullptr; const MachineRegisterInfo *MRI = nullptr; - const TargetIntrinsicInfo *IntrinsicInfo = nullptr; - tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII); + tryToGetTargetInfo(*this, TRI, MRI, TII); if (isCFIInstruction()) assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction"); @@ -1784,7 +1780,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{}; unsigned TiedOperandIdx = getTiedOperandIdx(StartOp); MO.print(OS, MST, TypeToPrint, StartOp, /*PrintDef=*/false, IsStandalone, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo); + ShouldPrintRegisterTies, TiedOperandIdx, TRI); ++StartOp; } @@ -1846,9 +1842,9 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, const unsigned OpIdx = InlineAsm::MIOp_AsmString; LLT TypeToPrint = MRI ? getTypeToPrint(OpIdx, PrintedTypes, *MRI) : LLT{}; unsigned TiedOperandIdx = getTiedOperandIdx(OpIdx); - getOperand(OpIdx).print(OS, MST, TypeToPrint, OpIdx, /*PrintDef=*/true, IsStandalone, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, - IntrinsicInfo); + getOperand(OpIdx).print(OS, MST, TypeToPrint, OpIdx, /*PrintDef=*/true, + IsStandalone, ShouldPrintRegisterTies, + TiedOperandIdx, TRI); // Print HasSideEffects, MayLoad, MayStore, IsAlignStack unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm(); @@ -1886,7 +1882,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{}; unsigned TiedOperandIdx = getTiedOperandIdx(i); MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo); + ShouldPrintRegisterTies, TiedOperandIdx, TRI); } } else if (isDebugLabel() && MO.isMetadata()) { // Pretty print DBG_LABEL instructions. @@ -1897,7 +1893,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{}; unsigned TiedOperandIdx = getTiedOperandIdx(i); MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo); + ShouldPrintRegisterTies, TiedOperandIdx, TRI); } } else if (i == AsmDescOp && MO.isImm()) { // Pretty print the inline asm operand descriptor. @@ -1941,7 +1937,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, MachineOperand::printSubRegIdx(OS, MO.getImm(), TRI); else MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone, - ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo); + ShouldPrintRegisterTies, TiedOperandIdx, TRI); } } diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index f498491164e14..231d66607b700 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -27,7 +27,6 @@ #include "llvm/IR/Instructions.h" #include "llvm/IR/ModuleSlotTracker.h" #include "llvm/MC/MCDwarf.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include @@ -450,14 +449,11 @@ hash_code llvm::hash_value(const MachineOperand &MO) { llvm_unreachable("Invalid machine operand type"); } -// Try to crawl up to the machine function and get TRI and IntrinsicInfo from -// it. +// Try to crawl up to the machine function and get TRI from it. static void tryToGetTargetInfo(const MachineOperand &MO, - const TargetRegisterInfo *&TRI, - const TargetIntrinsicInfo *&IntrinsicInfo) { + const TargetRegisterInfo *&TRI) { if (const MachineFunction *MF = getMFIfAvailable(MO)) { TRI = MF->getSubtarget().getRegisterInfo(); - IntrinsicInfo = MF->getTarget().getIntrinsicInfo(); } } @@ -781,20 +777,19 @@ static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, } } -void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI, - const TargetIntrinsicInfo *IntrinsicInfo) const { - print(OS, LLT{}, TRI, IntrinsicInfo); +void MachineOperand::print(raw_ostream &OS, + const TargetRegisterInfo *TRI) const { + print(OS, LLT{}, TRI); } void MachineOperand::print(raw_ostream &OS, LLT TypeToPrint, - const TargetRegisterInfo *TRI, - const TargetIntrinsicInfo *IntrinsicInfo) const { - tryToGetTargetInfo(*this, TRI, IntrinsicInfo); + const TargetRegisterInfo *TRI) const { + tryToGetTargetInfo(*this, TRI); ModuleSlotTracker DummyMST(nullptr); print(OS, DummyMST, TypeToPrint, std::nullopt, /*PrintDef=*/false, /*IsStandalone=*/true, /*ShouldPrintRegisterTies=*/true, - /*TiedOperandIdx=*/0, TRI, IntrinsicInfo); + /*TiedOperandIdx=*/0, TRI); } void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, @@ -802,8 +797,7 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned TiedOperandIdx, - const TargetRegisterInfo *TRI, - const TargetIntrinsicInfo *IntrinsicInfo) const { + const TargetRegisterInfo *TRI) const { printTargetFlags(OS, *this); switch (getType()) { case MachineOperand::MO_Register: { @@ -1004,8 +998,6 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, Intrinsic::ID ID = getIntrinsicID(); if (ID < Intrinsic::num_intrinsics) OS << "intrinsic(@" << Intrinsic::getBaseName(ID) << ')'; - else if (IntrinsicInfo) - OS << "intrinsic(@" << IntrinsicInfo->getName(ID) << ')'; else OS << "intrinsic(" << ID << ')'; break; diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 4a9ac8580e4e2..7178f6398bede 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -97,7 +97,6 @@ #include "llvm/Support/InstructionCost.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/TargetParser/Triple.h" @@ -9364,13 +9363,8 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) { if (Function *F = I.getCalledFunction()) { if (F->isDeclaration()) { - // Is this an LLVM intrinsic or a target-specific intrinsic? - unsigned IID = F->getIntrinsicID(); - if (!IID) - if (const TargetIntrinsicInfo *II = TM.getIntrinsicInfo()) - IID = II->getIntrinsicID(F); - - if (IID) { + // Is this an LLVM intrinsic? + if (unsigned IID = F->getIntrinsicID()) { visitIntrinsicCall(I, IID); return; } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index 7b1a2d640a2bd..7ab8beab1bda2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -43,7 +43,6 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Printable.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include #include @@ -164,8 +163,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); if (!G) return "Unknown intrinsic"; - if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) - return TII->getName(IID); llvm_unreachable("Invalid intrinsic ID"); } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 66db2ae993de8..61e5aa270bc11 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -98,7 +98,6 @@ #include "llvm/Support/KnownBits.h" #include "llvm/Support/Timer.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" @@ -4424,8 +4423,6 @@ void SelectionDAGISel::CannotYetSelect(SDNode *N) { unsigned iid = N->getConstantOperandVal(HasInputChain); if (iid < Intrinsic::num_intrinsics) Msg << "intrinsic %" << Intrinsic::getBaseName((Intrinsic::ID)iid); - else if (const TargetIntrinsicInfo *TII = TM.getIntrinsicInfo()) - Msg << "target intrinsic %" << TII->getName(iid); else Msg << "unknown intrinsic #" << iid; } diff --git a/llvm/lib/Target/CMakeLists.txt b/llvm/lib/Target/CMakeLists.txt index 2739233f9ccb3..9472288229cac 100644 --- a/llvm/lib/Target/CMakeLists.txt +++ b/llvm/lib/Target/CMakeLists.txt @@ -4,7 +4,6 @@ list(APPEND LLVM_TABLEGEN_FLAGS -I ${LLVM_MAIN_SRC_DIR}/lib/Target) add_llvm_component_library(LLVMTarget Target.cpp - TargetIntrinsicInfo.cpp TargetLoweringObjectFile.cpp TargetMachine.cpp TargetMachineC.cpp diff --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp index ec654e0f3f200..e96c1758676a1 100644 --- a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp @@ -24,7 +24,6 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/FormatVariadic.h" -#include "llvm/Target/TargetIntrinsicInfo.h" using namespace llvm; diff --git a/llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp index 6027d24636d69..e7b942e42b0a2 100644 --- a/llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp @@ -24,7 +24,6 @@ #include "llvm/IR/Constants.h" #include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/IntrinsicsSPIRV.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #include #define DEBUG_TYPE "spirv-postlegalizer" diff --git a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp index b5ef8d2a9286f..32f6af3d1440f 100644 --- a/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp @@ -23,7 +23,6 @@ #include "llvm/IR/Constants.h" #include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/IntrinsicsSPIRV.h" -#include "llvm/Target/TargetIntrinsicInfo.h" #define DEBUG_TYPE "spirv-prelegalizer" diff --git a/llvm/lib/Target/TargetIntrinsicInfo.cpp b/llvm/lib/Target/TargetIntrinsicInfo.cpp deleted file mode 100644 index d44a34984c421..0000000000000 --- a/llvm/lib/Target/TargetIntrinsicInfo.cpp +++ /dev/null @@ -1,27 +0,0 @@ -//===-- TargetIntrinsicInfo.cpp - Target Instruction Information ----------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file implements the TargetIntrinsicInfo class. -// -//===----------------------------------------------------------------------===// - -#include "llvm/Target/TargetIntrinsicInfo.h" -#include "llvm/ADT/StringMapEntry.h" -#include "llvm/IR/Function.h" -using namespace llvm; - -TargetIntrinsicInfo::TargetIntrinsicInfo() = default; - -TargetIntrinsicInfo::~TargetIntrinsicInfo() = default; - -unsigned TargetIntrinsicInfo::getIntrinsicID(const Function *F) const { - const ValueName *ValName = F->getValueName(); - if (!ValName) - return 0; - return lookupName(ValName->getKeyData(), ValName->getKeyLength()); -} diff --git a/llvm/unittests/CodeGen/MachineOperandTest.cpp b/llvm/unittests/CodeGen/MachineOperandTest.cpp index 714d6b5c50265..3f3f48fcc7c58 100644 --- a/llvm/unittests/CodeGen/MachineOperandTest.cpp +++ b/llvm/unittests/CodeGen/MachineOperandTest.cpp @@ -69,10 +69,10 @@ TEST(MachineOperandTest, PrintRegisterMask) { ASSERT_TRUE(MO.getRegMask() == Dummy); // Print a MachineOperand containing a RegMask. Here we check that without a - // TRI and IntrinsicInfo we still print a less detailed regmask. + // TRI we still print a less detailed regmask. std::string str; raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == ""); } @@ -90,10 +90,10 @@ TEST(MachineOperandTest, PrintSubReg) { ASSERT_TRUE(MO.getSubReg() == 5); // Print a MachineOperand containing a SubReg. Here we check that without a - // TRI and IntrinsicInfo we can still print the subreg index. + // TRI we can still print the subreg index. std::string str; raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "$physreg1.subreg5"); } @@ -112,10 +112,10 @@ TEST(MachineOperandTest, PrintCImm) { ASSERT_TRUE(MO.getCImm()->getValue() == Int); // Print a MachineOperand containing a SubReg. Here we check that without a - // TRI and IntrinsicInfo we can still print the subreg index. + // TRI we can still print the subreg index. std::string str; raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "i128 18446744073709551616"); } @@ -129,7 +129,7 @@ TEST(MachineOperandTest, PrintSubRegIndex) { ASSERT_TRUE(MO.getImm() == 3); // Print a MachineOperand containing a SubRegIdx. Here we check that without a - // TRI and IntrinsicInfo we can print the operand as a subreg index. + // TRI we can print the operand as a subreg index. std::string str; raw_string_ostream OS(str); MachineOperand::printSubRegIdx(OS, MO.getImm(), nullptr); @@ -151,7 +151,7 @@ TEST(MachineOperandTest, PrintCPI) { std::string str; { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "%const.0 + 8"); } @@ -163,7 +163,7 @@ TEST(MachineOperandTest, PrintCPI) { // offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "%const.0 - 12"); } } @@ -182,7 +182,7 @@ TEST(MachineOperandTest, PrintTargetIndexName) { std::string str; { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "target-index() + 8"); } @@ -193,7 +193,7 @@ TEST(MachineOperandTest, PrintTargetIndexName) { // Print a MachineOperand containing a target index and a negative offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "target-index() - 12"); } } @@ -210,7 +210,7 @@ TEST(MachineOperandTest, PrintJumpTableIndex) { // Print a MachineOperand containing a jump-table index. std::string str; raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "%jump-table.3"); } @@ -227,7 +227,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { std::string str; { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "&foo"); } @@ -237,7 +237,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { // Print a MachineOperand containing an external symbol and a positive offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "&foo + 12"); } @@ -247,7 +247,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { // Print a MachineOperand containing an external symbol and a negative offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "&foo - 12"); } } @@ -273,7 +273,7 @@ TEST(MachineOperandTest, PrintGlobalAddress) { // Print a MachineOperand containing a global address and a positive offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "@foo + 12"); } @@ -283,7 +283,7 @@ TEST(MachineOperandTest, PrintGlobalAddress) { // Print a MachineOperand containing a global address and a negative offset. { raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "@foo - 12"); } } @@ -301,7 +301,7 @@ TEST(MachineOperandTest, PrintRegisterLiveOut) { std::string str; // Print a MachineOperand containing a register live out list without a TRI. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "liveout()"); } @@ -325,9 +325,9 @@ TEST(MachineOperandTest, PrintMetadata) { std::string str; // Print a MachineOperand containing a metadata node. raw_string_ostream OS(str); - MO.print(OS, MST, LLT{}, /*OpIdx*/~0U, /*PrintDef=*/false, /*IsStandalone=*/false, - /*ShouldPrintRegisterTies=*/false, 0, /*TRI=*/nullptr, - /*IntrinsicInfo=*/nullptr); + MO.print(OS, MST, LLT{}, /*OpIdx*/ ~0U, /*PrintDef=*/false, + /*IsStandalone=*/false, + /*ShouldPrintRegisterTies=*/false, 0, /*TRI=*/nullptr); ASSERT_TRUE(str == "!0"); } @@ -348,7 +348,7 @@ TEST(MachineOperandTest, PrintMCSymbol) { std::string str; // Print a MachineOperand containing a metadata node. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == ""); } @@ -365,7 +365,7 @@ TEST(MachineOperandTest, PrintCFI) { // Print a MachineOperand containing a CFI Index node but no machine function // attached to it. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == ""); } @@ -382,7 +382,7 @@ TEST(MachineOperandTest, PrintIntrinsicID) { { // Print a MachineOperand containing a generic intrinsic ID. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "intrinsic(@llvm.bswap)"); } @@ -393,7 +393,7 @@ TEST(MachineOperandTest, PrintIntrinsicID) { // Print a MachineOperand containing a target-specific intrinsic ID but not // IntrinsicInfo. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "intrinsic(4294967295)"); } } @@ -410,7 +410,7 @@ TEST(MachineOperandTest, PrintPredicate) { std::string str; // Print a MachineOperand containing a int predicate ICMP_EQ. raw_string_ostream OS(str); - MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); + MO.print(OS, /*TRI=*/nullptr); ASSERT_TRUE(str == "intpred(eq)"); } diff --git a/llvm/unittests/MIR/MachineMetadata.cpp b/llvm/unittests/MIR/MachineMetadata.cpp index b16f70be6efe5..51204f23945c1 100644 --- a/llvm/unittests/MIR/MachineMetadata.cpp +++ b/llvm/unittests/MIR/MachineMetadata.cpp @@ -131,8 +131,7 @@ TEST_F(MachineMetadataTest, TrivialHook) { MO.print(OS, MST, LLT{}, /*OpIdx*/ ~0U, /*PrintDef=*/false, /*IsStandalone=*/false, /*ShouldPrintRegisterTies=*/false, /*TiedOperandIdx=*/0, - /*TRI=*/nullptr, - /*IntrinsicInfo=*/nullptr); + /*TRI=*/nullptr); })); // Print the definition of that metadata node. EXPECT_EQ("!0 = !{!\"foo\"}", @@ -169,8 +168,7 @@ TEST_F(MachineMetadataTest, BasicHook) { MO.print(OS, MST, LLT{}, /*OpIdx*/ ~0U, /*PrintDef=*/false, /*IsStandalone=*/false, /*ShouldPrintRegisterTies=*/false, /*TiedOperandIdx=*/0, - /*TRI=*/nullptr, - /*IntrinsicInfo=*/nullptr); + /*TRI=*/nullptr); })); // Print the definition of these unnamed metadata nodes. EXPECT_EQ("!0 = !{!\"bar\"}", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn index 01b004aad97cd..3439d25f16b2f 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn @@ -40,7 +40,6 @@ static_library("Target") { ] sources = [ "Target.cpp", - "TargetIntrinsicInfo.cpp", "TargetLoweringObjectFile.cpp", "TargetMachine.cpp", "TargetMachineC.cpp",