Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 3 additions & 0 deletions llvm/docs/ReleaseNotes.md
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,9 @@ Changes to the LLVM IR
Changes to LLVM infrastructure
------------------------------

* Removed support for target intrinsics being defined in the target directories
themselves (i.e., the `TargetIntrinsicInfo` class).

Changes to building LLVM
------------------------

Expand Down
10 changes: 3 additions & 7 deletions llvm/include/llvm/CodeGen/MachineOperand.h
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@ class MachineRegisterInfo;
class MCCFIInstruction;
class MDNode;
class ModuleSlotTracker;
class TargetIntrinsicInfo;
class TargetRegisterInfo;
class hash_code;
class raw_ostream;
Expand Down Expand Up @@ -283,8 +282,7 @@ class MachineOperand {
/// Providing a valid \p TRI and \p IntrinsicInfo results in a more
/// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the
/// function will try to pick it up from the parent.
void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr,
const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr) const;

/// More complex way of printing a MachineOperand.
/// \param TypeToPrint specifies the generic type to be printed on uses and
Expand All @@ -310,14 +308,12 @@ class MachineOperand {
void print(raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint,
std::optional<unsigned> OpIdx, bool PrintDef, bool IsStandalone,
bool ShouldPrintRegisterTies, unsigned TiedOperandIdx,
const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const;
const TargetRegisterInfo *TRI) const;

/// Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level
/// type to be printed the same way the full version of print(...) does it.
void print(raw_ostream &os, LLT TypeToPrint,
const TargetRegisterInfo *TRI = nullptr,
const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
const TargetRegisterInfo *TRI = nullptr) const;

void dump() const;

Expand Down
68 changes: 0 additions & 68 deletions llvm/include/llvm/Target/TargetIntrinsicInfo.h

This file was deleted.

6 changes: 0 additions & 6 deletions llvm/include/llvm/Target/TargetMachine.h
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,6 @@ class ScheduleDAGInstrs;
class SMDiagnostic;
class SMRange;
class Target;
class TargetIntrinsicInfo;
class TargetIRAnalysis;
class TargetTransformInfo;
class TargetLoweringObjectFile;
Expand Down Expand Up @@ -242,11 +241,6 @@ class TargetMachine {
const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }

/// If intrinsic information is available, return it. If not, return null.
virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
return nullptr;
}

bool requiresStructuredCFG() const { return RequireStructuredCFG; }
void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }

Expand Down
7 changes: 1 addition & 6 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -79,7 +79,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/Utils/Local.h"
#include "llvm/Transforms/Utils/MemoryOpRemark.h"
Expand Down Expand Up @@ -2758,7 +2757,6 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
return false;

const CallInst &CI = cast<CallInst>(U);
auto TII = MF->getTarget().getIntrinsicInfo();
const Function *F = CI.getCalledFunction();

// FIXME: support Windows dllimport function calls and calls through
Expand All @@ -2782,11 +2780,8 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
diagnoseDontCall(CI);

Intrinsic::ID ID = Intrinsic::not_intrinsic;
if (F && F->isIntrinsic()) {
if (F && F->isIntrinsic())
ID = F->getIntrinsicID();
if (TII && ID == Intrinsic::not_intrinsic)
ID = static_cast<Intrinsic::ID>(TII->getIntrinsicID(F));
}

if (!F || !F->isIntrinsic() || ID == Intrinsic::not_intrinsic)
return translateCallBase(CI, MIRBuilder);
Expand Down
8 changes: 1 addition & 7 deletions llvm/lib/CodeGen/MIRParser/MIParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,6 @@
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/SMLoc.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
#include <cctype>
Expand Down Expand Up @@ -2669,13 +2668,8 @@ bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
if (expectAndConsume(MIToken::rparen))
return error("expected ')' to terminate intrinsic name");

// Find out what intrinsic we're dealing with, first try the global namespace
// and then the target's private intrinsics if that fails.
const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();
// Find out what intrinsic we're dealing with.
Intrinsic::ID ID = Intrinsic::lookupIntrinsicID(Name);
if (ID == Intrinsic::not_intrinsic && TII)
ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));

if (ID == Intrinsic::not_intrinsic)
return error("unknown intrinsic name");
Dest = MachineOperand::CreateIntrinsicID(ID);
Expand Down
5 changes: 2 additions & 3 deletions llvm/lib/CodeGen/MIRPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1007,10 +1007,9 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
unsigned TiedOperandIdx = 0;
if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();
Op.print(OS, MST, TypeToPrint, OpIdx, PrintDef, /*IsStandalone=*/false,
ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
OS << formatOperandComment(MOComment);
ShouldPrintRegisterTies, TiedOperandIdx, TRI);
OS << formatOperandComment(MOComment);
break;
}
case MachineOperand::MO_FrameIndex:
Expand Down
22 changes: 9 additions & 13 deletions llvm/lib/CodeGen/MachineInstr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -70,18 +70,15 @@ static const MachineFunction *getMFIfAvailable(const MachineInstr &MI) {
return nullptr;
}

// Try to crawl up to the machine function and get TRI and IntrinsicInfo from
// it.
// Try to crawl up to the machine function and get TRI/MRI/TII from it.
static void tryToGetTargetInfo(const MachineInstr &MI,
const TargetRegisterInfo *&TRI,
const MachineRegisterInfo *&MRI,
const TargetIntrinsicInfo *&IntrinsicInfo,
const TargetInstrInfo *&TII) {

if (const MachineFunction *MF = getMFIfAvailable(MI)) {
TRI = MF->getSubtarget().getRegisterInfo();
MRI = &MF->getRegInfo();
IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
TII = MF->getSubtarget().getInstrInfo();
}
}
Expand Down Expand Up @@ -1753,8 +1750,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
// We can be a bit tidier if we know the MachineFunction.
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII);
tryToGetTargetInfo(*this, TRI, MRI, TII);

if (isCFIInstruction())
assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
Expand Down Expand Up @@ -1784,7 +1780,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(StartOp);
MO.print(OS, MST, TypeToPrint, StartOp, /*PrintDef=*/false, IsStandalone,
ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo);
ShouldPrintRegisterTies, TiedOperandIdx, TRI);
++StartOp;
}

Expand Down Expand Up @@ -1846,9 +1842,9 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
const unsigned OpIdx = InlineAsm::MIOp_AsmString;
LLT TypeToPrint = MRI ? getTypeToPrint(OpIdx, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(OpIdx);
getOperand(OpIdx).print(OS, MST, TypeToPrint, OpIdx, /*PrintDef=*/true, IsStandalone,
ShouldPrintRegisterTies, TiedOperandIdx, TRI,
IntrinsicInfo);
getOperand(OpIdx).print(OS, MST, TypeToPrint, OpIdx, /*PrintDef=*/true,
IsStandalone, ShouldPrintRegisterTies,
TiedOperandIdx, TRI);

// Print HasSideEffects, MayLoad, MayStore, IsAlignStack
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
Expand Down Expand Up @@ -1886,7 +1882,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(i);
MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone,
ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo);
ShouldPrintRegisterTies, TiedOperandIdx, TRI);
}
} else if (isDebugLabel() && MO.isMetadata()) {
// Pretty print DBG_LABEL instructions.
Expand All @@ -1897,7 +1893,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(i);
MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone,
ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo);
ShouldPrintRegisterTies, TiedOperandIdx, TRI);
}
} else if (i == AsmDescOp && MO.isImm()) {
// Pretty print the inline asm operand descriptor.
Expand Down Expand Up @@ -1941,7 +1937,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
MachineOperand::printSubRegIdx(OS, MO.getImm(), TRI);
else
MO.print(OS, MST, TypeToPrint, i, /*PrintDef=*/true, IsStandalone,
ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo);
ShouldPrintRegisterTies, TiedOperandIdx, TRI);
}
}

Expand Down
26 changes: 9 additions & 17 deletions llvm/lib/CodeGen/MachineOperand.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,6 @@
#include "llvm/IR/Instructions.h"
#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include <optional>

Expand Down Expand Up @@ -450,14 +449,11 @@ hash_code llvm::hash_value(const MachineOperand &MO) {
llvm_unreachable("Invalid machine operand type");
}

// Try to crawl up to the machine function and get TRI and IntrinsicInfo from
// it.
// Try to crawl up to the machine function and get TRI from it.
static void tryToGetTargetInfo(const MachineOperand &MO,
const TargetRegisterInfo *&TRI,
const TargetIntrinsicInfo *&IntrinsicInfo) {
const TargetRegisterInfo *&TRI) {
if (const MachineFunction *MF = getMFIfAvailable(MO)) {
TRI = MF->getSubtarget().getRegisterInfo();
IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
}
}

Expand Down Expand Up @@ -781,29 +777,27 @@ static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI,
}
}

void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const {
print(OS, LLT{}, TRI, IntrinsicInfo);
void MachineOperand::print(raw_ostream &OS,
const TargetRegisterInfo *TRI) const {
print(OS, LLT{}, TRI);
}

void MachineOperand::print(raw_ostream &OS, LLT TypeToPrint,
const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const {
tryToGetTargetInfo(*this, TRI, IntrinsicInfo);
const TargetRegisterInfo *TRI) const {
tryToGetTargetInfo(*this, TRI);
ModuleSlotTracker DummyMST(nullptr);
print(OS, DummyMST, TypeToPrint, std::nullopt, /*PrintDef=*/false,
/*IsStandalone=*/true,
/*ShouldPrintRegisterTies=*/true,
/*TiedOperandIdx=*/0, TRI, IntrinsicInfo);
/*TiedOperandIdx=*/0, TRI);
}

void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
LLT TypeToPrint, std::optional<unsigned> OpIdx,
bool PrintDef, bool IsStandalone,
bool ShouldPrintRegisterTies,
unsigned TiedOperandIdx,
const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const {
const TargetRegisterInfo *TRI) const {
printTargetFlags(OS, *this);
switch (getType()) {
case MachineOperand::MO_Register: {
Expand Down Expand Up @@ -1004,8 +998,6 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
Intrinsic::ID ID = getIntrinsicID();
if (ID < Intrinsic::num_intrinsics)
OS << "intrinsic(@" << Intrinsic::getBaseName(ID) << ')';
else if (IntrinsicInfo)
OS << "intrinsic(@" << IntrinsicInfo->getName(ID) << ')';
else
OS << "intrinsic(" << ID << ')';
break;
Expand Down
10 changes: 2 additions & 8 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,6 @@
#include "llvm/Support/InstructionCost.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/Triple.h"
Expand Down Expand Up @@ -9364,13 +9363,8 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {

if (Function *F = I.getCalledFunction()) {
if (F->isDeclaration()) {
// Is this an LLVM intrinsic or a target-specific intrinsic?
unsigned IID = F->getIntrinsicID();
if (!IID)
if (const TargetIntrinsicInfo *II = TM.getIntrinsicInfo())
IID = II->getIntrinsicID(F);

if (IID) {
// Is this an LLVM intrinsic?
if (unsigned IID = F->getIntrinsicID()) {
visitIntrinsicCall(I, IID);
return;
}
Expand Down
3 changes: 0 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Printable.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include <cstdint>
#include <iterator>
Expand Down Expand Up @@ -164,8 +163,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
if (!G)
return "Unknown intrinsic";
if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
return TII->getName(IID);
llvm_unreachable("Invalid intrinsic ID");
}

Expand Down
Loading