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[MLIR][GPUToLLVMSPV] Fix subgroup ops mangling #126111

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[MLIR][GPUToLLVMSPV] Fix subgroup ops mangling #126111

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8 changes: 4 additions & 4 deletions mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -401,13 +401,13 @@ struct GPUSubgroupOpConversion final : ConvertOpToLLVMPattern<SubgroupOp> {
ConversionPatternRewriter &rewriter) const final {
constexpr StringRef funcName = [] {
if constexpr (std::is_same_v<SubgroupOp, gpu::SubgroupIdOp>) {
return "_Z16get_sub_group_id";
return "_Z16get_sub_group_idv";
} else if constexpr (std::is_same_v<SubgroupOp, gpu::LaneIdOp>) {
return "_Z22get_sub_group_local_id";
return "_Z22get_sub_group_local_idv";
} else if constexpr (std::is_same_v<SubgroupOp, gpu::NumSubgroupsOp>) {
return "_Z18get_num_sub_groups";
return "_Z18get_num_sub_groupsv";
} else if constexpr (std::is_same_v<SubgroupOp, gpu::SubgroupSizeOp>) {
return "_Z18get_sub_group_size";
return "_Z18get_sub_group_sizev";
}
}();

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16 changes: 8 additions & 8 deletions mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
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Expand Up @@ -546,28 +546,28 @@ gpu.module @kernels {

// Lowering of subgroup query operations

// CHECK-DAG: llvm.func spir_funccc @_Z18get_sub_group_size() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z18get_num_sub_groups() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z22get_sub_group_local_id() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z16get_sub_group_id() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z18get_sub_group_sizev() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z18get_num_sub_groupsv() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z22get_sub_group_local_idv() -> i32 attributes {no_unwind, will_return}
// CHECK-DAG: llvm.func spir_funccc @_Z16get_sub_group_idv() -> i32 attributes {no_unwind, will_return}


gpu.module @subgroup_operations {
// CHECK-LABEL: @gpu_subgroup
func.func @gpu_subgroup() {
// CHECK: %[[SG_ID:.*]] = llvm.call spir_funccc @_Z16get_sub_group_id() {no_unwind, will_return} : () -> i32
// CHECK: %[[SG_ID:.*]] = llvm.call spir_funccc @_Z16get_sub_group_idv() {no_unwind, will_return} : () -> i32
// CHECK-32-NOT: llvm.zext
// CHECK-64 %{{.*}} = llvm.zext %[[SG_ID]] : i32 to i64
%0 = gpu.subgroup_id : index
// CHECK: %[[SG_LOCAL_ID:.*]] = llvm.call spir_funccc @_Z22get_sub_group_local_id() {no_unwind, will_return} : () -> i32
// CHECK: %[[SG_LOCAL_ID:.*]] = llvm.call spir_funccc @_Z22get_sub_group_local_idv() {no_unwind, will_return} : () -> i32
// CHECK-32-NOT: llvm.zext
// CHECK-64: %{{.*}} = llvm.zext %[[SG_LOCAL_ID]] : i32 to i64
%1 = gpu.lane_id
// CHECK: %[[NUM_SGS:.*]] = llvm.call spir_funccc @_Z18get_num_sub_groups() {no_unwind, will_return} : () -> i32
// CHECK: %[[NUM_SGS:.*]] = llvm.call spir_funccc @_Z18get_num_sub_groupsv() {no_unwind, will_return} : () -> i32
// CHECK-32-NOT: llvm.zext
// CHECK-64: %{{.*}} = llvm.zext %[[NUM_SGS]] : i32 to i64
%2 = gpu.num_subgroups : index
// CHECK: %[[SG_SIZE:.*]] = llvm.call spir_funccc @_Z18get_sub_group_size() {no_unwind, will_return} : () -> i32
// CHECK: %[[SG_SIZE:.*]] = llvm.call spir_funccc @_Z18get_sub_group_sizev() {no_unwind, will_return} : () -> i32
// CHECK-32-NOT: llvm.zext
// CHECK-64: %{{.*}} = llvm.zext %[[SG_SIZE]] : i32 to i64
%3 = gpu.subgroup_size : index
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