From 61bb886c849cb52ba3857b032cfbface50168eac Mon Sep 17 00:00:00 2001 From: Brendan Dahl Date: Wed, 19 Feb 2025 21:17:35 +0000 Subject: [PATCH 1/3] [WebAssembly] Use the same lowerings for f16x8 as other float vectors. This fixes failures to select the various compare operations that weren't being expanded for f16x8. --- .../lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 10 ++++------ llvm/test/CodeGen/WebAssembly/half-precision.ll | 10 ++++++++++ 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index fedad25c775e2..dc3efc702ac23 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -121,7 +121,10 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(ISD::VACOPY, MVT::Other, Expand); setOperationAction(ISD::VAEND, MVT::Other, Expand); - for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { + for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64, MVT::v8f16}) { + if (!Subtarget->hasFP16() && T == MVT::v8f16) { + continue; + } // Don't expand the floating-point types to constant pools. setOperationAction(ISD::ConstantFP, T, Legal); // Expand floating-point comparisons. @@ -147,11 +150,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setTruncStoreAction(T, MVT::f16, Expand); } - if (Subtarget->hasFP16()) { - setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal); - setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal); - } - // Expand unavailable integer operations. for (auto Op : {ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU, diff --git a/llvm/test/CodeGen/WebAssembly/half-precision.ll b/llvm/test/CodeGen/WebAssembly/half-precision.ll index 5f0ba4aa9c3c4..59becd0e7e5c3 100644 --- a/llvm/test/CodeGen/WebAssembly/half-precision.ll +++ b/llvm/test/CodeGen/WebAssembly/half-precision.ll @@ -172,6 +172,16 @@ define <8 x i1> @compare_oge_v8f16 (<8 x half> %x, <8 x half> %y) { ret <8 x i1> %res } +; CHECK-LABEL: compare_ule_v8f16: +; CHECK-NEXT: .functype compare_ule_v8f16 (v128, v128) -> (v128){{$}} +; CHECK-NEXT: f16x8.gt $push[[T0:[0-9]+]]=, $0, $1{{$}} +; CHECK-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} +; CHECK-NEXT: return $pop[[R]]{{$}} +define <8 x i1> @compare_ule_v8f16 (<8 x half> %x, <8 x half> %y) { + %res = fcmp ule <8 x half> %x, %y + ret <8 x i1> %res +} + ; CHECK-LABEL: abs_v8f16: ; CHECK-NEXT: .functype abs_v8f16 (v128) -> (v128) ; CHECK-NEXT: f16x8.abs $push0=, $0 From d9472cc8fb08095f054292e323c939d4c7ab76c0 Mon Sep 17 00:00:00 2001 From: Brendan Dahl Date: Tue, 25 Feb 2025 02:45:06 +0000 Subject: [PATCH 2/3] Skip expansion when f16 is enabled. --- llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index dc3efc702ac23..36fe30cd3453d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -143,9 +143,12 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( // Support minimum and maximum, which otherwise default to expand. setOperationAction(ISD::FMINIMUM, T, Legal); setOperationAction(ISD::FMAXIMUM, T, Legal); - // WebAssembly currently has no builtin f16 support. - setOperationAction(ISD::FP16_TO_FP, T, Expand); - setOperationAction(ISD::FP_TO_FP16, T, Expand); + // When experimental vector f16 is enabled these instructions don't need to + // be expanded for v8f16. + if (T != MVT::v8f16) { + setOperationAction(ISD::FP16_TO_FP, T, Expand); + setOperationAction(ISD::FP_TO_FP16, T, Expand); + } setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); setTruncStoreAction(T, MVT::f16, Expand); } From 4bdaaddf58d754e50b99ad2942d066db7f07825e Mon Sep 17 00:00:00 2001 From: Brendan Dahl Date: Tue, 25 Feb 2025 18:56:01 +0000 Subject: [PATCH 3/3] fix comment --- llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 36fe30cd3453d..1b5641ed5e9de 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -143,8 +143,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( // Support minimum and maximum, which otherwise default to expand. setOperationAction(ISD::FMINIMUM, T, Legal); setOperationAction(ISD::FMAXIMUM, T, Legal); - // When experimental vector f16 is enabled these instructions don't need to - // be expanded for v8f16. + // When experimental v8f16 support is enabled these instructions don't need + // to be expanded. if (T != MVT::v8f16) { setOperationAction(ISD::FP16_TO_FP, T, Expand); setOperationAction(ISD::FP_TO_FP16, T, Expand);