diff --git a/llvm/lib/Target/X86/X86PreTileConfig.cpp b/llvm/lib/Target/X86/X86PreTileConfig.cpp
index 96801636deb9e..e8d90da1fb1e0 100644
--- a/llvm/lib/Target/X86/X86PreTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86PreTileConfig.cpp
@@ -234,9 +234,10 @@ INITIALIZE_PASS_END(X86PreTileConfig, "tilepreconfig",
 void X86PreTileConfig::collectShapeInfo(MachineInstr &MI, unsigned Shapes) {
   auto RecordShape = [&](MachineInstr *MI, MachineBasicBlock *MBB) {
     MIRef MIR(MI, MBB);
-    auto I = llvm::lower_bound(ShapeBBs[MBB], MIR);
-    if (I == ShapeBBs[MBB].end() || *I != MIR)
-      ShapeBBs[MBB].insert(I, MIR);
+    auto &Refs = ShapeBBs[MBB];
+    auto I = llvm::lower_bound(Refs, MIR);
+    if (I == Refs.end() || *I != MIR)
+      Refs.insert(I, MIR);
   };
 
   // All shapes have same row in multi-tile operand.