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[X86][DAGCombiner] Skip x87 fp80 values in combineFMulOrFDivWithIntPow2 #128618

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Merged
merged 4 commits into from
Feb 25, 2025
Merged

[X86][DAGCombiner] Skip x87 fp80 values in combineFMulOrFDivWithIntPow2 #128618

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53eea16
[X86][DAGCombiner] Add pre-commit tests. NFC.
dtcxzyw Feb 25, 2025
2ea93f9
[X86][DAGCombiner] Skip x87 f80 values in `combineFMulOrFDivWithIntPow2`
dtcxzyw Feb 25, 2025
31b19aa
[DAGCombiner] Do not use IR types
dtcxzyw Feb 25, 2025
392249f
[ADT] Add a helper "APFloat::isIEEELikeFP"
dtcxzyw Feb 25, 2025
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8 changes: 6 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -17271,6 +17271,10 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
// prefer it.
SDValue DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {
EVT VT = N->getValueType(0);
if (!Type::getFloatingPointTy(*DAG.getContext(), VT.getFltSemantics())
->isIEEELikeFPTy())
return SDValue();

SDValue ConstOp, Pow2Op;

std::optional<int> Mantissa;
Expand All @@ -17297,8 +17301,8 @@ SDValue DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {

const APFloat &APF = CFP->getValueAPF();

// Make sure we have normal/ieee constant.
if (!APF.isNormal() || !APF.isIEEE())
// Make sure we have normal constant.
if (!APF.isNormal())
return false;

// Make sure the floats exponent is within the bounds that this transform
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28 changes: 28 additions & 0 deletions llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
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Expand Up @@ -1688,3 +1688,31 @@ define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind {
%mul = fdiv float 0x3a20000000000000, %conv
ret float %mul
}

define x86_fp80 @pr128528(i1 %cond) {
; CHECK-SSE-LABEL: pr128528:
; CHECK-SSE: # %bb.0:
; CHECK-SSE-NEXT: testb $1, %dil
; CHECK-SSE-NEXT: movl $8, %eax
; CHECK-SSE-NEXT: movl $1, %ecx
; CHECK-SSE-NEXT: cmovnel %eax, %ecx
; CHECK-SSE-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
; CHECK-SSE-NEXT: fildl -{{[0-9]+}}(%rsp)
; CHECK-SSE-NEXT: fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: pr128528:
; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: testb $1, %dil
; CHECK-AVX-NEXT: movl $8, %eax
; CHECK-AVX-NEXT: movl $1, %ecx
; CHECK-AVX-NEXT: cmovnel %eax, %ecx
; CHECK-AVX-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
; CHECK-AVX-NEXT: fildl -{{[0-9]+}}(%rsp)
; CHECK-AVX-NEXT: fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
; CHECK-AVX-NEXT: retq
%sub9 = select i1 %cond, i32 8, i32 1
%conv = uitofp i32 %sub9 to x86_fp80
%mul = fmul x86_fp80 %conv, 0xK4007D055555555555800
ret x86_fp80 %mul
}
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