diff --git a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td index 7d7e69adafcd0..1d62cccdae522 100644 --- a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td +++ b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td @@ -1971,93 +1971,72 @@ class ATOMIC_SHARED_CHK class ATOMIC_GENERIC_CHK : PatFrag; -multiclass F_ATOMIC_2_imp Pred> { + Operand IMMType, SDNode IMM, list Pred = []> { let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in { - def reg : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, regclass:$b), - !strconcat("atom", SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b;"), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), (regT regclass:$b)))]>, + def r : NVPTXInst<(outs regclass:$dst), (ins ADDR:$addr, regclass:$b), + "atom" # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b;", + [(set (regT regclass:$dst), (IntOp addr:$addr, (regT regclass:$b)))]>, Requires; - def imm : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, IMMType:$b), - !strconcat("atom", SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b;", ""), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), IMM:$b))]>, - Requires], Pred)>; + if !not(!or(!eq(TypeStr, ".f16"), !eq(TypeStr, ".bf16"))) then + def i : NVPTXInst<(outs regclass:$dst), (ins ADDR:$addr, IMMType:$b), + "atom" # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b;", + [(set (regT regclass:$dst), (IntOp addr:$addr, IMM:$b))]>, + Requires; } } -multiclass F_ATOMIC_2 Pred = []> { - defm p32 : F_ATOMIC_2_imp; - defm p64 : F_ATOMIC_2_imp; -} // has 2 operands, neg the second one -multiclass F_ATOMIC_2_NEG_imp Pred> { + list Pred = []> { let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in { - def reg : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, regclass:$b), + def reg : NVPTXInst<(outs regclass:$dst), (ins ADDR:$addr, regclass:$b), !strconcat( "{{ \n\t", ".reg \t.s", TypeStr, " temp; \n\t", "neg.s", TypeStr, " \ttemp, $b; \n\t", "atom", SpaceStr, OpcStr, ".u", TypeStr, " \t$dst, [$addr], temp; \n\t", "}}"), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), (regT regclass:$b)))]>, + [(set (regT regclass:$dst), (IntOp addr:$addr, (regT regclass:$b)))]>, Requires; } } -multiclass F_ATOMIC_2_NEG Pred = []> { - defm p32: F_ATOMIC_2_NEG_imp ; - defm p64: F_ATOMIC_2_NEG_imp ; -} // has 3 operands -multiclass F_ATOMIC_3_imp Pred> { + Operand IMMType, list Pred = []> { let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in { - def reg : NVPTXInst<(outs regclass:$dst), - (ins ptrclass:$addr, regclass:$b, regclass:$c), - !strconcat("atom", SemStr, SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b, $c;"), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), (regT regclass:$b), (regT regclass:$c)))]>, + def rr : NVPTXInst<(outs regclass:$dst), + (ins ADDR:$addr, regclass:$b, regclass:$c), + "atom" # SemStr # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b, $c;", + [(set (regT regclass:$dst), (IntOp addr:$addr, regT:$b, regT:$c))]>, Requires; - def imm1 : NVPTXInst<(outs regclass:$dst), - (ins ptrclass:$addr, IMMType:$b, regclass:$c), - !strconcat("atom", SemStr, SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b, $c;"), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), imm:$b, (regT regclass:$c)))]>, + def ir : NVPTXInst<(outs regclass:$dst), + (ins ADDR:$addr, IMMType:$b, regclass:$c), + "atom" # SemStr # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b, $c;", + [(set (regT regclass:$dst), (IntOp addr:$addr, imm:$b, regT:$c))]>, Requires; - def imm2 : NVPTXInst<(outs regclass:$dst), - (ins ptrclass:$addr, regclass:$b, IMMType:$c), - !strconcat("atom", SemStr, SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b, $c;", ""), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), (regT regclass:$b), imm:$c))]>, + def ri : NVPTXInst<(outs regclass:$dst), + (ins ADDR:$addr, regclass:$b, IMMType:$c), + "atom" # SemStr # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b, $c;", + [(set (regT regclass:$dst), (IntOp addr:$addr, regT:$b, imm:$c))]>, Requires; - def imm3 : NVPTXInst<(outs regclass:$dst), - (ins ptrclass:$addr, IMMType:$b, IMMType:$c), - !strconcat("atom", SemStr, SpaceStr, OpcStr, TypeStr, " \t$dst, [$addr], $b, $c;"), - [(set (regT regclass:$dst), (IntOp (ptrT ptrclass:$addr), imm:$b, imm:$c))]>, + def ii : NVPTXInst<(outs regclass:$dst), + (ins ADDR:$addr, IMMType:$b, IMMType:$c), + "atom" # SemStr # SpaceStr # OpcStr # TypeStr # " \t$dst, [$addr], $b, $c;", + [(set (regT regclass:$dst), (IntOp addr:$addr, imm:$b, imm:$c))]>, Requires; } } -multiclass F_ATOMIC_3 Pred = []> { - defm p32 : F_ATOMIC_3_imp; - defm p64 : F_ATOMIC_3_imp; -} // atom_add @@ -2529,27 +2508,15 @@ multiclass ATOM2P_impl Preds> { let AddedComplexity = 1 in { def : ATOM23_impl; - def : ATOM23_impl; - def : ATOM23_impl; + (ins ADDR:$src, regclass:$b), + (Intr addr:$src, regT:$b)>; } // tablegen can't infer argument types from Intrinsic (though it can // from Instruction) so we have to enforce specific type on // immediates via explicit cast to ImmTy. def : ATOM23_impl; - def : ATOM23_impl; - def : ATOM23_impl; + (ins ADDR:$src, ImmType:$b), + (Intr addr:$src, (ImmTy Imm:$b))>; } multiclass ATOM3P_impl; - def : ATOM23_impl; + (ins ADDR:$src, regclass:$b, regclass:$c), + (Intr addr:$src, regT:$b, regT:$c)>; } let AddedComplexity = 1 in { def : ATOM23_impl; + (ins ADDR:$src, ImmType:$b, regclass:$c), + (Intr addr:$src, (ImmTy Imm:$b), regT:$c)>; def : ATOM23_impl; - def : ATOM23_impl; - def : ATOM23_impl; + (ins ADDR:$src, regclass:$b, ImmType:$c), + (Intr addr:$src, regT:$b, (ImmTy Imm:$c))>; } def : ATOM23_impl; - def : ATOM23_impl; + (ins ADDR:$src, ImmType:$b, ImmType:$c), + (Intr addr:$src, (ImmTy Imm:$b), (ImmTy Imm:$c))>; } // Constructs intrinsic name and instruction asm strings.