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[PPC] Fix coding style violations in PPCTargetTransformInfo.cpp #130666

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Merged
merged 3 commits into from
Mar 13, 2025
Merged

[PPC] Fix coding style violations in PPCTargetTransformInfo.cpp #130666

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f67dc02
To fix violations of code conventions
kostasalv Mar 10, 2025
330e819
clang-tidy naming conventions
kostasalv Mar 10, 2025
36facc2
clang-format
kostasalv Mar 10, 2025
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42 changes: 20 additions & 22 deletions llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -112,8 +112,8 @@ PPCTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {

// Check that all of the elements are integer constants or undefs.
bool AllEltsOk = true;
for (unsigned i = 0; i != 16; ++i) {
Constant *Elt = Mask->getAggregateElement(i);
for (unsigned I = 0; I != 16; ++I) {
Constant *Elt = Mask->getAggregateElement(I);
if (!Elt || !(isa<ConstantInt>(Elt) || isa<UndefValue>(Elt))) {
AllEltsOk = false;
break;
Expand All @@ -132,11 +132,11 @@ PPCTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
Value *ExtractedElts[32];
memset(ExtractedElts, 0, sizeof(ExtractedElts));

for (unsigned i = 0; i != 16; ++i) {
if (isa<UndefValue>(Mask->getAggregateElement(i)))
for (unsigned I = 0; I != 16; ++I) {
if (isa<UndefValue>(Mask->getAggregateElement(I)))
continue;
unsigned Idx =
cast<ConstantInt>(Mask->getAggregateElement(i))->getZExtValue();
cast<ConstantInt>(Mask->getAggregateElement(I))->getZExtValue();
Idx &= 31; // Match the hardware behavior.
if (DL.isLittleEndian())
Idx = 31 - Idx;
Expand All @@ -150,7 +150,7 @@ PPCTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {

// Insert this value into the result vector.
Result = IC.Builder.CreateInsertElement(Result, ExtractedElts[Idx],
IC.Builder.getInt32(i));
IC.Builder.getInt32(I));
}
return CastInst::Create(Instruction::BitCast, Result, II.getType());
}
Expand Down Expand Up @@ -457,16 +457,15 @@ unsigned PPCTTIImpl::getNumberOfRegisters(unsigned ClassID) const {
unsigned PPCTTIImpl::getRegisterClassForType(bool Vector, Type *Ty) const {
if (Vector)
return ST->hasVSX() ? VSXRC : VRRC;
else if (Ty && (Ty->getScalarType()->isFloatTy() ||
Ty->getScalarType()->isDoubleTy()))
if (Ty &&
(Ty->getScalarType()->isFloatTy() || Ty->getScalarType()->isDoubleTy()))
return ST->hasVSX() ? VSXRC : FPRRC;
else if (Ty && (Ty->getScalarType()->isFP128Ty() ||
Ty->getScalarType()->isPPC_FP128Ty()))
if (Ty && (Ty->getScalarType()->isFP128Ty() ||
Ty->getScalarType()->isPPC_FP128Ty()))
return VRRC;
else if (Ty && Ty->getScalarType()->isHalfTy())
if (Ty && Ty->getScalarType()->isHalfTy())
return VSXRC;
else
return GPRRC;
return GPRRC;
}

const char* PPCTTIImpl::getRegisterClassName(unsigned ClassID) const {
Expand Down Expand Up @@ -694,8 +693,8 @@ InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
return 0;

return Cost;

} else if (Val->getScalarType()->isIntegerTy()) {
}
if (Val->getScalarType()->isIntegerTy()) {
unsigned EltSize = Val->getScalarSizeInBits();
// Computing on 1 bit values requires extra mask or compare operations.
unsigned MaskCostForOneBitSize = (VecMaskCost && EltSize == 1) ? 1 : 0;
Expand All @@ -709,15 +708,15 @@ InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
if (ISD == ISD::INSERT_VECTOR_ELT) {
if (ST->hasP10Vector())
return CostFactor + MaskCostForIdx;
else if (Index != -1U)
if (Index != -1U)
return 2 * CostFactor;
} else if (ISD == ISD::EXTRACT_VECTOR_ELT) {
// It's an extract. Maybe we can do a cheap move-from VSR.
unsigned EltSize = Val->getScalarSizeInBits();
// P9 has both mfvsrd and mfvsrld for 64 bit integer.
if (EltSize == 64 && Index != -1U)
return 1;
else if (EltSize == 32) {
if (EltSize == 32) {
unsigned MfvsrwzIndex = ST->isLittleEndian() ? 2 : 1;
if (Index == MfvsrwzIndex)
return 1;
Expand Down Expand Up @@ -847,9 +846,9 @@ InstructionCost PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
// stores, loads are expanded using the vector-load + permutation sequence,
// which is much less expensive).
if (Src->isVectorTy() && Opcode == Instruction::Store)
for (int i = 0, e = cast<FixedVectorType>(Src)->getNumElements(); i < e;
++i)
Cost += getVectorInstrCost(Instruction::ExtractElement, Src, CostKind, i,
for (int I = 0, E = cast<FixedVectorType>(Src)->getNumElements(); I < E;
++I)
Cost += getVectorInstrCost(Instruction::ExtractElement, Src, CostKind, I,
nullptr, nullptr);

return Cost;
Expand Down Expand Up @@ -960,8 +959,7 @@ bool PPCTTIImpl::isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
C1.NumBaseAdds, C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
std::tie(C2.Insns, C2.NumRegs, C2.AddRecCost, C2.NumIVMuls,
C2.NumBaseAdds, C2.ScaleCost, C2.ImmCost, C2.SetupCost);
else
return TargetTransformInfoImplBase::isLSRCostLess(C1, C2);
return TargetTransformInfoImplBase::isLSRCostLess(C1, C2);
}

bool PPCTTIImpl::isNumRegsMajorCostOfLSR() {
Expand Down