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llvmbot commented Mar 15, 2025

@llvm/pr-subscribers-backend-arm

Author: Kazu Hirata (kazutakahirata)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/131420.diff

1 Files Affected:

  • (modified) llvm/lib/Target/ARM/ARMParallelDSP.cpp (+8-4)
diff --git a/llvm/lib/Target/ARM/ARMParallelDSP.cpp b/llvm/lib/Target/ARM/ARMParallelDSP.cpp
index 4e92720de4755..e8bbd15c1ca03 100644
--- a/llvm/lib/Target/ARM/ARMParallelDSP.cpp
+++ b/llvm/lib/Target/ARM/ARMParallelDSP.cpp
@@ -715,10 +715,14 @@ void ARMParallelDSP::InsertParallelMACs(Reduction &R) {
     MulCandidate *RHSMul = Pair.second;
     LoadInst *BaseLHS = LHSMul->getBaseLoad();
     LoadInst *BaseRHS = RHSMul->getBaseLoad();
-    LoadInst *WideLHS = WideLoads.count(BaseLHS) ?
-      WideLoads[BaseLHS]->getLoad() : CreateWideLoad(LHSMul->VecLd, Ty);
-    LoadInst *WideRHS = WideLoads.count(BaseRHS) ?
-      WideLoads[BaseRHS]->getLoad() : CreateWideLoad(RHSMul->VecLd, Ty);
+    auto LIt = WideLoads.find(BaseLHS);
+    LoadInst *WideLHS = LIt != WideLoads.end()
+                            ? LIt->second->getLoad()
+                            : CreateWideLoad(LHSMul->VecLd, Ty);
+    auto RIt = WideLoads.find(BaseRHS);
+    LoadInst *WideRHS = RIt != WideLoads.end()
+                            ? RIt->second->getLoad()
+                            : CreateWideLoad(RHSMul->VecLd, Ty);
 
     Instruction *InsertAfter = GetInsertPoint(WideLHS, WideRHS);
     InsertAfter = GetInsertPoint(InsertAfter, Acc);

@kazutakahirata kazutakahirata merged commit 4230858 into llvm:main Mar 15, 2025
13 checks passed
@kazutakahirata kazutakahirata deleted the cleanup_001_repeated_hash_lookups_llvm_ARM branch March 15, 2025 16:11
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3 participants