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@aaupov aaupov commented Mar 19, 2025

Use the section to identify jump tables

Test Plan: added AArch64/jump-table-info.s

Created using spr 1.3.4
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⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:
git-clang-format --diff fdde8efe8f3defd18e40bbafefd2a46a1d1e6b0c d49a2b5128ec798990d9b542aac0562fb83f1317 --extensions h,cpp -- bolt/lib/Rewrite/JumpTableInfoReader.cpp bolt/include/bolt/Core/JumpTable.h bolt/include/bolt/Rewrite/MetadataRewriters.h bolt/lib/Core/BinaryContext.cpp bolt/lib/Rewrite/RewriteInstance.cpp
View the diff from clang-format here.
diff --git a/bolt/lib/Rewrite/JumpTableInfoReader.cpp b/bolt/lib/Rewrite/JumpTableInfoReader.cpp
index 66e85b5b30..19e65a2b0c 100644
--- a/bolt/lib/Rewrite/JumpTableInfoReader.cpp
+++ b/bolt/lib/Rewrite/JumpTableInfoReader.cpp
@@ -63,7 +63,7 @@ Error JumpTableInfoReader::preDisasmInitializer() {
 
     if (Type == JumpTable::JTT_AARCH64_LAST) {
       errs() << "BOLT-WARNING: unknown jump table info type " << Format
-                << " for jump table " << Twine::utohexstr(JTAddr) << '\n';
+             << " for jump table " << Twine::utohexstr(JTAddr) << '\n';
       continue;
     }
 

uint64_t NextJTAddress = 0;
auto NextJTI = std::next(JTI);
if (NextJTI != JTE)
if (isAArch64()) {
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@yavtuk yavtuk Mar 20, 2025

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here can be a gap between JTs, it's better to check $d symbol or next JT address

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Thanks for a suggestion, this part is a bit nuanced and needs a comment.
First, there's an implicit assumption that on ARM jump tables are only created in JumpTableInfoReader, not through instruction sequence/memory analysis as on X86.
Second, since jump table size is known in advance, NextJTAddress is just used as end address. It's not actually used to find the next jump table (neither on X86).

@@ -0,0 +1,236 @@
## Check parsing of a .llvm_jump_table_info section
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(Can use the llvm/utils/update_test_body.py format to make re-generation easier :) )

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4 participants