[SPIR-V] Don't add linkage attributes for input variables

[cassiebeckley]

Fixes #131878

[cassiebeckley]

@s-perron @Keenuts

[llvmbot]

@llvm/pr-subscribers-backend-spir-v

Author: Cassandra Beckley (cassiebeckley)

Changes

Fixes #131878

---

Full diff: https://github.com/llvm/llvm-project/pull/132301.diff

4 Files Affected:

• (modified) llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp (+2-2)
• (modified) llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll (-1)
• (modified) llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupID.ll (-1)
• (modified) llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupThreadID.ll (-1)

diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 2aba950037ec3..bd54590c87cac 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -3993,7 +3993,7 @@ bool SPIRVInstructionSelector::loadVec3BuiltinInputID(
   // builtin variable.
   Register Variable = GR.buildGlobalVariable(
       NewRegister, PtrType, getLinkStringForBuiltIn(BuiltInValue), nullptr,
-      SPIRV::StorageClass::Input, nullptr, true, true,
+      SPIRV::StorageClass::Input, nullptr, true, false,
       SPIRV::LinkageType::Import, MIRBuilder, false);
 
   // Create new register for loading value.
@@ -4046,7 +4046,7 @@ bool SPIRVInstructionSelector::loadBuiltinInputID(
   // builtin variable.
   Register Variable = GR.buildGlobalVariable(
       NewRegister, PtrType, getLinkStringForBuiltIn(BuiltInValue), nullptr,
-      SPIRV::StorageClass::Input, nullptr, true, true,
+      SPIRV::StorageClass::Input, nullptr, true, false,
       SPIRV::LinkageType::Import, MIRBuilder, false);
 
   // Load uint value from the global variable.
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
index 7243977c68a02..2b2ce0974216c 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_DispatchThreadID.ll
@@ -16,7 +16,6 @@
 
 ; CHECK-DAG:        OpEntryPoint GLCompute {{.*}} %[[#GlobalInvocationId]]
 ; CHECK-DAG:        OpName %[[#GlobalInvocationId]] "__spirv_BuiltInGlobalInvocationId"
-; CHECK-DAG:        OpDecorate %[[#GlobalInvocationId]] LinkageAttributes "__spirv_BuiltInGlobalInvocationId" Import
 ; CHECK-DAG:        OpDecorate %[[#GlobalInvocationId]] BuiltIn GlobalInvocationId
 
 ; ModuleID = '-'
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupID.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupID.ll
index 92947f7865ced..bb7650810e989 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupID.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupID.ll
@@ -9,7 +9,6 @@
 
 ; CHECK-DAG:        OpEntryPoint GLCompute {{.*}} %[[#WorkgroupId]]
 ; CHECK-DAG:        OpName %[[#WorkgroupId]] "__spirv_BuiltInWorkgroupId"
-; CHECK-DAG:        OpDecorate %[[#WorkgroupId]] LinkageAttributes "__spirv_BuiltInWorkgroupId" Import
 ; CHECK-DAG:        OpDecorate %[[#WorkgroupId]] BuiltIn WorkgroupId
 
 target triple = "spirv-unknown-vulkan-library"
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupThreadID.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupThreadID.ll
index a88debf97fa7b..4e31d3fb77411 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupThreadID.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/SV_GroupThreadID.ll
@@ -16,7 +16,6 @@
 
 ; CHECK-DAG:        OpEntryPoint GLCompute {{.*}} %[[#LocalInvocationId]]
 ; CHECK-DAG:        OpName %[[#LocalInvocationId]] "__spirv_BuiltInLocalInvocationId"
-; CHECK-DAG:        OpDecorate %[[#LocalInvocationId]] LinkageAttributes "__spirv_BuiltInLocalInvocationId" Import
 ; CHECK-DAG:        OpDecorate %[[#LocalInvocationId]] BuiltIn LocalInvocationId
 
 ; ModuleID = '-'